This paper addresses two questions related to electrical characterization of devices at the contact level in a semiconductor failure analysis: Is it possible to use scanning electron microscope/focused electron beam based probing system to do electrical characterization at device level despite the fact that there is beam induced device degradation? What are the effects to consider if a beam exposed sample has to be characterized by a nano-probing technique during the failure analysis flow? To answer these questions, an experimental setup with a drive transistor of a single port SRAM manufactured in a 90nm CMOS process was employed. Results confirmed the effect of electron beam induced alteration on integrated devices and it was shown that several parameters influence the investigated device, e.g., beam acceleration voltage and dose used for radiation. The alteration was due to trapped charge located in the gate oxide and also electrons trapped in interface states.

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