Abstract

Quiescent Signal Analysis (QSA) is an IDDQ method for detecting defects that is based on the analysis of multiple simultaneous measurements of supply port IDDQs. The nature of the information in the multiple IDDQs measurements also allows for the localization of the defect to physical coordinates in the chip. In previous work, we derived a hyperbola-based method from simulation experiments that is able to "triangulate" the position of the defect in the layout. In this paper, we evaluate the accuracy of this method using data collected from 12 chips fabricated in a 65 nm process.

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