Thermal fatigue cracking of lead-free solder joints within flipchip packages was investigated in this study by using scanning acoustic microscope (SAM) and SEM. The distribution of substrate delaminations was mapped with SAM of high depth resolution and observed in cross-section with SEM to find the mechanism of crack growth during thermal reliability tests. The study revealed that the interfacial crack always initiated from the pad edge. This is attributed to the coefficient of thermal expansion (CTE) mismatch between underfill and the PCB substrate. The propagation of fatigue crack within solder joint is closely related to the morphology of interfacial/intergranular intermetallic compound (IMC) formed at the elevated temperature of thermal cycle.

coefficient of thermal expansion, crack growth, delamination, flip-chip packages, printed circuit boards, scanning acoustic microscope, scanning electron microscopes, solder joints, thermal fatigue cracking, thermal reliability test
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Copyright © 2006 ASM International. All rights reserved.
2006
ASM International
Topics
Delamination Scanning electron microscopy Scanning acoustic microscopy Semiconductor wafer fabrication Coefficient of thermal expansion Thermal fatigue fracture Elevated temperature life testing
Issue Section:
Advanced Techniques
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