Abstract

In this paper we present the advanced optical testing of an array fabricated in IBM’s 65 nm SOI CMOS technology, using the Picosecond Imaging Circuit Analysis (PICA) [1-11] tool equipped with the Superconducting Single-Photon Detector (SSPD) [12,13]. Based on the results of the optical analysis we were able to confirm a time collision problem in the readout circuit of the array. In the following sections we will also discuss the use of an innovative optical packaging for testing chips requiring wire-bonding, along with record low voltage optical measurements, down to 0.7 V.

This content is only available as a PDF.
You do not currently have access to this content.