Abstract

Designing devices for failure analisys (FA) is becoming increasingly critical as structure geometries and killer defects rapidly decrease in size. Naturally, devices that are designed for FA are much easier to analyze and have a higher FA success rate than those that are not. Several analyses of functional failures in a 0.18um CMOS SRAM are presented in this paper to demonstrate “Design For FA” usefulness and application. Physical analysis methodology is also discussed.

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