Abstract
Atomic Force Probe (AFP) techniques are well suited for the electrical characterization of sub-65nm node SOI devices with multiple metal interconnect levels and low-k interlevel dielectric films. This paper discusses the use of these techniques on sub-30nm gatelength SOI MOSFETs.
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Copyright © 2004 ASM International. All rights reserved.
2004
ASM International
Issue Section:
Scanning Probe Microscopy
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