The presence of sharp, “pointed” features on Printed Circuit Board (PCB) power planes and their contribution to increased plane-to-plane electric fields is studied as a potential root cause for PCB level dielectric breakdown. The results of this study are used to gauge the propensity for heat generation due to current leakage through pre-preg. A first order approximation for the E-field between a power and ground plane is Ê = V/d (1) where Ê is the electric field, V is the potential across the planes, and d is the separation between the planes. While this first order approximation is correct for infinite parallel planes, simulations show that second and third order effects that exist on real boards can multiply the effective Ê by more than 100x. The second order effects are primarily dependent on the local sharpness of planar shapes, and plane-to-plane separation. This amplified Efield could potentially breakdown pre-preg locally and initiate current leakage. Leakage through prepreg can grow over time as a leakage path becomes established and can wreak havoc with power rails or create a local ohmic conduction path that can lead to board level failures. A test platform and a series of experiments were developed to understand and quantify the various parameters that contribute to these failures. Tests revealed that given an ambient temperature of 70C, the presence of pointed features in planes reduces the breakdown voltage by at least 75%. It is suspected that under the right conditions, a breakdown will occur on a sharp shape if given sufficient duration of exposure to even low voltages.