The area of embedded SRAMs in advanced logic ICs is increasing more and more. On the other hand smaller structure sizes and an increasing number of metal layers make conventional failure localization by using emission microscopy or liquid crystal inefficient. In this paper a SRAM failure analysis strategy will be presented independent on layout and technology.

emission microscopy, failure analysis, failure localization, integrated circuits, liquid crystals, static random-access memory
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Copyright © 2003 ASM International. All rights reserved.
2003
ASM International
Topics
Microscopy Semiconductor wafer fabrication
Issue Section:
Failure Analysis Process
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