We present for the first time the results of a comprehensive study of the increase in propagation delay of multi-GHz digital signals due to backside FIB fabricated interconnects. Signal propagation delays were measured in 90nm CMOS technology circuits as a function of interconnect material properties and physical dimensions. We compare the empirical results of this study to SPICE calculations, which were based on an equivalent circuit element model of the interconnect. We show that the empirical data obtained in these experiments supports the validity of the equivalent electrical model for the frequency range typically encountered in modern microprocessor debug. Based on the results or our analysis, we comment on the future capability of backside FIB circuit edit (CE) interconnection technology as it pertains to the debug of flip-chip packaged IC’s operating at multi-GHz frequency.