A technique is presented for mapping the logic states of CMOS integrated circuits by observing their static infrared emission. Application of the technique is shown in two case studies. The technique has the advantages of being non-invasive, having high observability and reduced complexity compared with dynamic probing techniques.

CMOS, dynamic probing, failure analysis, infrared emission, integrated circuits, silicon
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Copyright © 2002 ASM International. All rights reserved.
2002
ASM International
Topics
Semiconductor wafer fabrication Infrared spectroscopy Silicon
Issue Section:
Die Level Fault Isolation
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