A robust procedure for poly-silicon wet etch selective to SiO2 is presented. The procedure is applicable for CMOS devices and maintains the integrity of the gate oxide film. The technique uses a 50% wt. choline hydroxide aqueous solution. The optimum etching conditions, which allow exposure of gate oxide to enable its further inspection using SEM or AFM were determined. An investigation of general silicon etching characteristics of choline hydroxide, as etch rate, selectivity and surface quality, has been carried out as well.