Abstract

Two optical techniques are currently available for making at-speed timing measurements through the backside of CMOS integrated circuits: Laser Voltage Probing and Picosecond Imaging Circuit Analysis. These techniques differ significantly in many ways, including potential for invasiveness, Silicon-On- Insulator probing capability, acquisition times versus test pattern loop length, data acquisition mode, and prospects for probing at the .0.1 ƒÊm nodes. This paper compares and contrasts these techniques so that their relative merits and limitations can be better understood.

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