Backside Etch: A New FA Technique for Gate Oxide Pinhole and Si Defect Identification for Power IC Devices

The present paper describes a backside F/A technique that identifies power IC devices’ I_qcc (quiescent Vcc current) failure mechanisms. Choline hydroxide[1, 2] is used to expose the entire die back, keeping gate oxide intact. The perspective gained from the backside etch allows an analyst to quantitatively observe gate oxide defects as well as Si defects. It is discovered that either one of them can cause the same I_qcc failure. More than 60 dice can be prepared on one specimen in 2-3 hrs. Another advantage of this technique over conventional top delayering or precision crosssection process is that no SEM work is necessary, only optical microscope is needed to identify defects with typical size of 0.1 μm.