The migration of microprocessor packaging from wire bond to flipchip technology in silicon "microsurgery" posed some challenges to on-chip circuit edit. The physical debug process through the backside silicon substrate was proposed as the common solution. The focus of this article is on step 2 of this process, namely the milling of large trenches over the edit area. Laser Chemical Etcher (LCE) was commonly used for this task. This article presents an alternative technique based on plasma dry etch process which consists of three steps: photolithography, plasma etching, and acoustic polishing. A detailed description of each step is provided, along with the details of experiments that were conducted for process optimization. The technique was successfully demonstrated in the preparation for backside FIB editing. However, the success rate of the proposed method is still lower than the LCE but this method can serve as a reliable backup process for the LCE.

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