Communication Signal Processors (CSP) did not have the Signal-to-noise ratio (SNR) performance expected. Significant differences were noticed between SNR values at wafer level and package testing. The analog section of the chip was suspected to be the culprit as the problem existed at the analog to digital conversion level. A Dielectric Altering Compound (DiAC) was chosen to simulate the packaged environment in decapsulated parts1. The DiAC was applied in and around the analog section, after application in other areas did not show the SNR degradation. The sampling capacitors in the A to D Converter section (ADC) were selectively coated with DiAC and laser trimmed to identify the offending circuit element. A signal trace running adjacent to the sampling caps, was isolated and suspected of coupling noise to the sampling caps. A FIB system was used to deposit a grounded metal shield that covered the suspect runner on a packaged part - subsequent testing showed no degradation. The above procedure was successful in isolating, verifying, and rectifying the SNR degradation. The SNR degradation was found on more than one code. The same procedure was used repeatedly on subsequent errant codes. Finally, a mask level fix on silicon achieved the desired SNR performance for all the codes.

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