Low yield was reported for a non-volatile embedded memory array. In one case, the n-channel transistor was observed to exhibit single bit OFF leakage in a 32K array. In another case, there was general leakage observed between drain junctions of neighboring transistors, even though these were isolated by field oxide. The objective of the failure analysis described in this article was to characterize the electrical behavior of the leakage and determine the exact location and cause of the leakage. Focused Ion Beam was used to make electrical contact to drain regions, which lacked a contact for microprobing. Once the electrical parameters were obtained, photoemission analysis was performed with modified probes for higher spatial resolution to pinpoint the leakage path. Finally, scanning capacitance microscopy methods were used to prove the presence of the n-type depletion path. Very clear and positive confirmation of the presence of the parasitic n-type dopant was confirmed.

This content is only available as a PDF.
You do not currently have access to this content.