To isolate defects in microprocessors, the failure analyst must exercise the device under the failing conditions. Exercising the device with a tester and the final test program is a natural choice. However, populating a lab with production testers can be prohibitively expensive. Bench top testers are an inexpensive alternative. The constraints of these testers make automated test program translation tools hard or impossible to use. In this paper, we describe an automated translation tool that approximates the original test program with very small engineering time, taking into account the target bench top tester's constraints. The tool consists of three parts. First, the production test is simulated, creating a file that represents the waveforms an oscilloscope would see at the device pins. The second step is the most complex and unique part of the tool. It guesses the setup and hold time built into the production test, and manipulates the timing to fit within the constraints of the bench top tester. The final step reduces vector memory requirements and does the final format translation.