Abstract

Electrical data from chromium-silicon-carbon (CrSiC) thin film resistors (tfr) consistently showed highly variable contact resistance (Rc) to the aluminum (Al) interconnect. Transmission electron microscopy data from CrSiC/Al interfaces exhibiting high Rc showed a conformal, amorphous layer sandwiched between the tfr and Al. Auger data from the tfr/Al interface showed this ‘crud’ layer to contain increased C, S, and SiOx. Auger data from CrSiC films on test wafers exposed to the process steps before Al deposition showed additional growth of the ‘crud’ layer after each photoresist (PR) operation. In addition, Rc variability was reduced on product wafers from split lots when 2x the normal PR strip time was used compared to the normal strip time. A Designed Experiment (DOE) to examine improving the removal of this ‘crud’ layer was run on product lots utilizing two factors: the standard strip and a two-step strip. Electrical results for both Rc and die yield were significantly improved using the two-step process. The variability of the Rc was also reduced.

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