The extensive use of planarization in many of today's leading process technologies significantly reduces the effectiveness of FIB circuit modification and debugging. Planarization has played a significant role in the development of denser chips with increasingly smaller geometries. Fully planarized devices offer little or no surface features on which the FIB operator relies for orientation and alignment. These conditions lead to increased debug cycle times and decreased success rates using the FIB. Recent FIB tool advancements in the field of C4 (controlled-collapse chip connection) flip-chip packaged device modification and debug have also made it easier to work on highly planarized conventional wire-bond technology. The integration of an optical microscope with an infrared camera into the work chamber allows the operator to view the circuitry under the surface layer. This paper will offer several techniques for overcoming the challenges that planarized devices present by using this in-situ optical microscope. When properly implemented, these techniques can significantly improve the success rate and throughput time of device modification on highly planarized parts.