Recent advances in integrated circuit technologies and in interconnect methodologies to external electronics have made it extremely difficult to conduct failure analysis from the top side of the die (1,2). Therefore analysis techniques are being developed that allow analysis from the backside of the die. The first step in this process involves gaining access to the back of the die through the packaging material. Most backside analysis techniques require that the die then be thinned and polished. This paper describes specialized equipment and procedures to meet those requirements. The equipment is relatively inexpensive compared to other approaches.

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