Case Study: Unique Stress Induced Gate Oxide Defects in a CMOS Analog/Digital Device Revealed by Backside Silicon Removal

Stress induced pinholes, cracks, and 'craters' have been found in the gate oxide of a double level metal, single level poly CMOS device containing both analog and digital circuits. These defects have been found randomly across the die in active gate regions, and were found in a line parallel to the gate width. These defects were hidden beneath the polysilicon, and were virtually undetectable electrically. The only electrical indication was a slight shift in the threshold voltage, still within specification limits. The polysilicon had a compressive layer of tungsten silicide (WSi_x) as a cap to lower the polysilicon resistivity and increase circuit speed. It was believed that polysilicon grains or WSi_x spikes were migrating into the gate oxide during the WSi_x annealing process. The defects were found in unstressed, untested parts, and in parts that passed all tests and stresses. Backside silicon removal showed defects in the gate oxide layer, and subsequent FIB sectioning revealed a WSi_x spike. Several techniques were employed to verify the gate oxide defects. Electrical and destructive physical analysis techniques will be presented in the paper.