Skip to Main Content

Abstract

Semiconductor memories are superb drivers for process yield and reliability improvement because of their highly structured architecture and use of aggressive layout rules. This combination provides outstanding failure signature analysis possibilities for the entire design, manufacturing, and test process. This article discusses five key disciplines of the signature analysis process that need to be orchestrated within the organization: design for test practices, test floor data collection methodology, post-test data analysis tools, root cause theorization, and physical failure analysis strategies.

You do not currently have access to this chapter.
Don't already have an account? Register

Cary A. Gloor, 2019. "The Power of Semiconductor Memory Failure Signature Analysis", Microelectronics Failure Analysis: Desk Reference, Tejinder Gandhi

Download citation file:


Close
Close Modal
This Feature Is Available To Subscribers Only

Sign In or Create an Account

Close Modal
Close Modal