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Journal Articles
Lock-in Infrared Microscopy with 1.4 μm Resolution Using a Solid Immersion Lens
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EDFA Technical Articles (2006) 8 (2): 4–13.
Published: 01 May 2006
... resolution is essential for successful application of thermal IR microscopy to modern IC technologies. This article shows that the use of a silicon solid immersion lens (SIL) may improve the spatial resolution of midrange IR microscopy to better than 1.5 µm. Solid Immersion Lenses If is the light...
Abstract
View articletitled, Lock-in Infrared Microscopy with 1.4 μm Resolution Using a <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lens</span>
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for article titled, Lock-in Infrared Microscopy with 1.4 μm Resolution Using a <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lens</span>
Backside optical analysis is often aided by solid immersion lenses (SILs), but as the authors of this article explain, SILs improve the resolution of front side thermography as well. The authors describe the physics behind solid immersion lenses and provide examples that demonstrate the advantages and limitations of their use from the font side.
Journal Articles
Combining Refractive Solid Immersion Lens and Pulsed Laser-Induced Technique for Integrated Circuit Failure Analysis
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EDFA Technical Articles (2010) 12 (3): 20–27.
Published: 01 August 2010
... a limit on the laser power that can be safely used on 45 nm devices, which further compromises fault localization precision. In this article, the authors explain how they overcome these limitations using pulsed laser-induced imaging techniques and a refractive solid immersion lens. Two case studies show...
Abstract
View articletitled, Combining Refractive <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lens</span> and Pulsed Laser-Induced Technique for Integrated Circuit Failure Analysis
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for article titled, Combining Refractive <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lens</span> and Pulsed Laser-Induced Technique for Integrated Circuit Failure Analysis
The best spatial resolution that can be achieved with far-field optical fault localization techniques is around 20 times larger than the critical defect size at the 45 nm technology node. There is also a limit on the laser power that can be safely used on 45 nm devices, which further compromises fault localization precision. In this article, the authors explain how they overcome these limitations using pulsed laser-induced imaging techniques and a refractive solid immersion lens. Two case studies show how the combination of pulsed-laser scanning optical microscopy and a solid immersion lens improves localization precision and detection sensitivity.
Journal Articles
Performance of Forming Substrate into Solid Immersion Lens (FOSSIL) for Backside Fault Isolation Techniques
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EDFA Technical Articles (2004) 6 (2): 21–27.
Published: 01 May 2004
... convex surfaces act as solid immersion lenses that are shown to improve spatial resolution by nearly an order of magnitude. The degree of improvement is evaluated using backside emission microscopy (EMS), optical beam induced current (OBIC) imaging, and laser voltage probing (LVP) and the results...
Abstract
View articletitled, Performance of Forming Substrate into <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lens</span> (FOSSIL) for Backside Fault Isolation Techniques
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for article titled, Performance of Forming Substrate into <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lens</span> (FOSSIL) for Backside Fault Isolation Techniques
Conventional backside imaging takes advantage of silicon’s transmission of light which, based on the Plank relation ( E g = hc/ λ ), occurs at wavelengths greater than 1 µm. Because of diffraction, the lateral spatial resolution of backside imaging techniques is limited to about half the wavelength of the light source used, which is far too coarse to isolate faults in a typical IC. In this article, the authors explain how they overcome this limitation by reprofiling the backside of the silicon, forming spherically shaped domes. The raised convex surfaces act as solid immersion lenses that are shown to improve spatial resolution by nearly an order of magnitude. The degree of improvement is evaluated using backside emission microscopy (EMS), optical beam induced current (OBIC) imaging, and laser voltage probing (LVP) and the results are presented in the article.
Journal Articles
A Through-Silicon Metrology Target for Solid Immersion Lenses, Part I: Metrology Chip and Example
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EDFA Technical Articles (2015) 17 (1): 12–20.
Published: 01 February 2015
... imaging resolution solid immersion lens through-silicon metrology target 1 2 httpsdoi.org/10.31399/asm.edfa.2015-1.p012 EDFAAO (2015) 1:12-20 1537-0755/$19.00 ©ASM International® ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 17 NO. 1 A THROUGH-SILICON METROLOGY TARGET FOR SOLID IMMERSION LENSES, PART I...
Abstract
View articletitled, A Through-Silicon Metrology Target for <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lenses</span>, Part I: Metrology Chip and Example
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for article titled, A Through-Silicon Metrology Target for <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lenses</span>, Part I: Metrology Chip and Example
Metrology targets are an essential tool for evaluating the performance of imaging systems and maintaining their accuracy over time. Ideally, the pattern on the target is simple enough that the expected image is intuitive or, at least, easily simulated. Although many such targets exist for frontside imaging, until recently, few if any could be found for backside applications. In this article, the first of a two-part series, the authors explain how they addressed this gap by converting a readily available frontside target for backside use. The conversion process is described step by step in enough detail that it can be replicated in order to convert other frontside targets. Due to the success of the converted target, an unmounted, backside-specific version has subsequently been developed, the availability of which not only eliminates one of the more difficult steps in the original conversion process, but also provides additional benefits. Using one of these newer targets, the authors evaluated a backside imaging system consisting of a laser scanning microscope (LSM) and a solid immersion lens (SIL). The results are presented here along with the criteria used for the evaluation. Other applications of the new metrology target as well as its limitations are discussed in the May 2015 issue of EDFA .
Journal Articles
Integrated Circuit Super-Resolution Failure Analysis with Solid Immersion Lenses
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EDFA Technical Articles (2014) 16 (2): 26–32.
Published: 01 May 2014
... such as adaptive optics, apodization masks, and interferometric measurements to further improve resolution and sensitivity as well as correct for aberrations.[2,3] 26 Electronic Device Failure Analysis Solid Immersion Lens Invented in 1990 by Mansfield,[4] solid immersion lenses (SILs) have become widely used...
Abstract
View articletitled, Integrated Circuit Super-Resolution Failure Analysis with <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lenses</span>
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for article titled, Integrated Circuit Super-Resolution Failure Analysis with <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lenses</span>
Researchers at Boston University have made significant improvements in the resolution that can be achieved with backside imaging techniques. In this article, they explain how they optimize lateral and longitudinal resolution of IR-based methods using aplanatic solid immersion lenses in combination with adaptive optics that correct for aberrations, interferometry to improve signal-to-noise ratios, vortex beams that overcome diffraction limitations, and image reconstruction techniques based on prior knowledge about the objects under investigation.
Journal Articles
Thermal Solutions for Device Analysis of Integrated Circuits
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EDFA Technical Articles (2004) 6 (4): 12–17.
Published: 01 November 2004
... surface. Second, some failure analysis techniques require direct contact with the die. For example, the solid immersion lens (SIL) technique requires direct die cooling. Although very low heat fluxes can be managed by direct cooling of the die using forced air convection, it has some application in device...
Abstract
View articletitled, Thermal Solutions for Device Analysis of Integrated Circuits
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for article titled, Thermal Solutions for Device Analysis of Integrated Circuits
This article discusses the generation of heat that occurs in ICs during failure analysis and examines the effectiveness of various die cooling techniques including heat spreading films, spray cooling, and liquid and air jet impingement.
Journal Articles
What’s Been Happening with the IVAs?
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EDFA Technical Articles (2010) 12 (3): 4–8.
Published: 01 August 2010
..., phase-locked loop detection techniques, the effect of solid immersion lenses on spatial resolution, and the emergence of production-type sample preparation methods. Copyright © ASM International® 2010 2010 ASM International detection sensitivity electrical biasing fault localization induced...
Abstract
View articletitled, What’s Been Happening with the IVAs?
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for article titled, What’s Been Happening with the IVAs?
One of the pioneering developers of induced voltage alteration (IVA) measurement techniques assesses the current state of the technology, the impact of major advancements, and the potential for further improvements. The assessment pays particular attention to biasing approaches, phase-locked loop detection techniques, the effect of solid immersion lenses on spatial resolution, and the emergence of production-type sample preparation methods.
Journal Articles
Fast Failure Isolation of Thermal Defects, Generally Shorts
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EDFA Technical Articles (2013) 15 (3): 4–11.
Published: 01 August 2013
... sensitive material to the surface of the device (e.g., liquid crystal). The issue with spatial resolution has also been addressed with the use of the solid immersion lens (SIL) with backside analysis.[1] In addition, phase shifts related to the heat propagation inside the device under test (DUT) can be used...
Abstract
View articletitled, Fast Failure Isolation of Thermal Defects, Generally Shorts
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for article titled, Fast Failure Isolation of Thermal Defects, Generally Shorts
The shrinking geometries in today’s 3-D integrated circuit (IC) designs generate an urgent need for a variety of tools to isolate failures on advanced semiconductor devices. There has been no single technique that adequately addresses all types of failures with the required fast cycle time. Complex failures that are not resolved by the faster global approaches are best addressed by probing technologies, where waveforms or voltages are measured from node to node. These approaches are time-consuming and usually require detailed understanding of the circuit operation. Global techniques that map the secondary effects of defects have been widely used for as many failures as possible. These secondary effects include thermal emission, photon emission, and circuit operation dependencies on localized heating or carrier generation at a defect site. Each technique addresses some segment of the failure mechanisms, but none is universally effective in itself. The use of thermal emission techniques has waned due to the issues of lower power supply voltages, which result in poor sensitivity for older techniques and decrease in minimum resolved feature sizes.
Journal Articles
Contoured Device Sample Preparation for ±5 μm Remaining Silicon Thickness (RST) Tolerances
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EDFA Technical Articles (2014) 16 (4): 14–19.
Published: 01 November 2014
... Immersion Lens Applications for Nanophotonic Devices, J. Nanophoton., 2008, p. 021854. 6. Solid Immersion Lenses, Technical Update, DCG Systems, Nov. 2011. 7. C. Richardson, G. Liechty, C. Smith, and M. Karow: Putting the Die Contour Back Methods in Advanced Sample Preparation for 3-D and Flip-Chip...
Abstract
View articletitled, Contoured Device Sample Preparation for ±5 μm Remaining Silicon Thickness (RST) Tolerances
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for article titled, Contoured Device Sample Preparation for ±5 μm Remaining Silicon Thickness (RST) Tolerances
This paper describes a methodology for preparing contoured devices by using a milling machine in conjunction with a spectral reflectance measurement system for meeting ±5 μm remaining silicon thickness (RST) tolerances.
Journal Articles
Failure Analysis Turned Upside Down: A Review of Backside Analysis Techniques
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EDFA Technical Articles (2003) 5 (4): 13–24.
Published: 01 November 2003
...Michael R. Bruce; Victoria J. Bruce; Seth Prejean; Jeffery Huynh This article provides a high-level review of the tools and techniques used for backside analysis. It discusses the use of laser scanning and conventional microscopy, liquid and solid immersion lenses, photon emission microscopy (PEM...
Abstract
View articletitled, Failure Analysis Turned Upside Down: A Review of Backside Analysis Techniques
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for article titled, Failure Analysis Turned Upside Down: A Review of Backside Analysis Techniques
This article provides a high-level review of the tools and techniques used for backside analysis. It discusses the use of laser scanning and conventional microscopy, liquid and solid immersion lenses, photon emission microscopy (PEM), and laser-based fault isolation methods with emphasis on light-induced voltage alteration (LIVA). It explains how laser voltage probing is used for backside waveform acquisition and describes backside sample preparation and deprocessing techniques including parallel polishing and milling, laser chemical etching, and FIB circuit edit and modification.
Journal Articles
Can Sisyphus Be Happy?
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EDFA Technical Articles (2009) 11 (2): 46–48.
Published: 01 May 2009
... and the nanometric scale challenges our optical tools. The sophisticated solid immersion lens provides an incredible optical resolution, thanks to its high numerical aperture, but its limits are very close, and looking at 45 nm technology is already a nightmare. We learned many lessons over the years, but we...
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View articletitled, Can Sisyphus Be Happy?
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for article titled, Can Sisyphus Be Happy?
This column reviews a survey of the top ISTFA contributors from 1999 to 2008 and the topics addressed in their papers.
Journal Articles
A Process for Thinning and Polishing Highly Warped Die to High Surface Quality And Consistent Thickness: Part I
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EDFA Technical Articles (2015) 17 (3): 20–28.
Published: 01 August 2015
... SURFACE QUALITY AND CONSISTENT THICKNESS: PART I Kirk A. Martin, RKD Engineering [email protected] INTRODUCTION The use of aplanatic solid immersion lens microscopes requires samples where the bulk silicon is typically thinned to 0.025 to 0.100 ± 0.005 mm (thinner samples are preferred1] This can...
Abstract
View articletitled, A Process for Thinning and Polishing Highly Warped Die to High Surface Quality And Consistent Thickness: Part I
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for article titled, A Process for Thinning and Polishing Highly Warped Die to High Surface Quality And Consistent Thickness: Part I
This article, the first in a two-part series, discusses the challenges of thinning highly warped die and explains how they can be overcome with contour machining driven by thickness measurements. The machine that was used measures die surface profiles in situ, producing a wire frame model by which it controls the rotation and movement of the tooling spindle. The thinning process used in this demonstration consists of a grinding step followed by several rounds of lapping, resulting in a uniform die thickness with minimal surface imperfections. The mechanical limitations of flattening a curved die in preparation for die thinning will be discussed in Part II of this article in the November 2015 issue of EDFA .
Journal Articles
An IARPA Success Story—The Circuit Analysis Tools Program
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EDFA Technical Articles (2015) 17 (3): 50–52.
Published: 01 August 2015
... structures. The second team, Boston University, working with DCG Systems, developed a super hemispherical, aplanatic, next-generation solid immersion lens (aSIL) and is integrating it onto a DCG Meridian IV system. The aSIL has a higher numerical aperture than a standard central SIL, and the Boston...
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View articletitled, An IARPA Success Story—The Circuit Analysis Tools Program
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for article titled, An IARPA Success Story—The Circuit Analysis Tools Program
The second phase of the IARPA Circuit Analysis Tools (CAT) program, which ended in June 2015, focused on the development of prototype tools to demonstrate scalability to the 10 nm node. Our guest columnist, IARPA Program Manager, Carl E. McCants, provides a summary of what the participating teams accomplished.
Journal Articles
ISTFA 2011 User’s Group Summaries
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EDFA Technical Articles (2012) 14 (1): 27–31.
Published: 01 February 2012
... improvements by Dave Donnet and novel chemistry developments from Valery Ray. Technical talks also included presentations from Philipp Scholz on novel applications for machining solid immersion lenses in silicon substrate and from Nicholas Antoniou on machining cryogenically cooled samples. Following the talks...
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View articletitled, ISTFA 2011 User’s Group Summaries
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for article titled, ISTFA 2011 User’s Group Summaries
This article provides a summary of each of the four User’s Group meetings that took place at ISTFA 2011. The summaries cover key participants, presentation topics, and discussion highlights from each of the following groups: Group 1, Focused Ion Beam; Group 2, 3D Packaging and Failure Analysis; Group 3, Finding the Invisible Defect; and Group 4, Nanoprobing and Electrical Characterization.
Journal Articles
The IARPA Circuit Analysis Tools Program
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EDFA Technical Articles (2013) 15 (4): 52–54.
Published: 01 November 2013
..., and integrating a developing tools and techniques cally at 22 nm and beyond, superhemispherical aplanatic next- to ensure that the U.S. government and for chips assembled generation solid immersion lens has capabilities for circuit analysis using advanced packaging (aSIL) microscope system capable at future...
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View articletitled, The IARPA Circuit Analysis Tools Program
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for article titled, The IARPA Circuit Analysis Tools Program
The semiconductor industry continues to scale microelectronics in accordance with Moore’s Law, as the minimum feature size on integrated circuits has decreased from 800 nm in 1993 to 90 nm in 2003 to 22 nm today. In addition, manufacturing advances include 3-D packaging, with multiple dice stacked in various configurations, and 3-D integrated circuits that use through-silicon vias or through-oxide vias to connect the various dice layers. The Intelligence Advanced Research Projects Activity (IARPA) Circuit Analysis Tools (CAT) program is developing tools and techniques to ensure that the U.S. government has capabilities for circuit analysis at future technology nodes, specifically at 22 nm and beyond, and for chips assembled using advanced packaging techniques. This column describes the CAT program activities and goals.
Journal Articles
A Through-Silicon Metrology Target for Solid Immersion Lenses, Part II: Other Applications
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EDFA Technical Articles (2015) 17 (2): 4–9.
Published: 01 May 2015
...William Lo; Howard Marks This is the second article in a two-part series that explains how to measure the performance of solid immersion lenses (SILs) used for backside imaging and analysis. In Part I, published in the February 2015 issue of EDFA , the authors describe how they modified a frontside...
Abstract
View articletitled, A Through-Silicon Metrology Target for <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lenses</span>, Part II: Other Applications
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for article titled, A Through-Silicon Metrology Target for <span class="search-highlight">Solid</span> <span class="search-highlight">Immersion</span> <span class="search-highlight">Lenses</span>, Part II: Other Applications
This is the second article in a two-part series that explains how to measure the performance of solid immersion lenses (SILs) used for backside imaging and analysis. In Part I, published in the February 2015 issue of EDFA , the authors describe how they modified a frontside metrology target and used it to evaluate a SIL in a backside imaging system, which prompted the development of an unmounted, backside-specific version of the through-silicon target. In Part II, they explain how these new targets, in addition to measuring resolution, are being used to determine the field of view as well as the line spread and edge response of backside imaging systems. They also discuss some of the challenges encountered when using the targets to characterize emission microscopy systems.
Journal Articles
ISTFA 2013 User's Groups Summaries
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EDFA Technical Articles (2014) 16 (1): 31–48.
Published: 01 February 2014
... panel session. The presentations covered a range of important industry topics, including aplanatic and centric solid immersion lenses (ASILs/ CSILs), different polarization states and their respective impacts on imaging, sample preparation and the criticality for use with high-numerical-aperture (NA...
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View articletitled, ISTFA 2013 User's Groups Summaries
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for article titled, ISTFA 2013 User's Groups Summaries
This article compiles summaries of User Group meetings held at ISTFA 2013, including the Contactless Fault Isolation User’s Group, the Focused Ion Beam User’s Group, the Sample Prep/3D Package User’s Group, and the Nanoprobing User’s Group. For each meeting, a brief synopsis of the presentations and subsequent dialog is provided.
Journal Articles
Backside Infrared Imaging of Integrated Circuits Using Refraction-Assisted Illumination
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EDFA Technical Articles (2010) 12 (4): 4–10.
Published: 01 November 2010
... of the resulting image. There are several approaches to increase image resolution and contrast for imaging microelectronic devices through the substrate, such as the use of antireflective coatings,[1] solid immersion lenses,[2] and numerical aperture increasing lenses.[3,4] These approaches require either...
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View articletitled, Backside Infrared Imaging of Integrated Circuits Using Refraction-Assisted Illumination
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for article titled, Backside Infrared Imaging of Integrated Circuits Using Refraction-Assisted Illumination
This article demonstrates a simple and robust backside illumination method for infrared imaging of ICs. The technique uses oblique illumination, which removes surface noise components while providing bright-field illumination under the surface, and requires only modest if any polishing of the backside of the substrate. As the examples in the article show, it can be implemented with a standard microscope with IR optics, yielding high contrast, high resolution images without the need for complex lenses, AR coatings, or sophisticated scanning electronics.
Journal Articles
ESREF 2011 in Bordeaux
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EDFA Technical Articles (2012) 14 (2): 22–27.
Published: 01 May 2012
...-Based Backside Reflected Light and Photon Emission Microscopy by FIB Ultimate Substrate Thinning and Chromatic and Spherical Aberration Correction for Silicon Aplanatic Solid Immersion Lens for Fault Isolation and Photon Emission Microscopy of Integrated Circuits. Another paper, Time-Resolved...
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View articletitled, ESREF 2011 in Bordeaux
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for article titled, ESREF 2011 in Bordeaux
The 22nd European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2011) was held October 3 to 7, 2011, in Bordeaux, France. The conference concentrated on two main areas in electronics that concern designers, manufacturers, and users: (1) strategy for quality and reliability assessment of electronic circuits and systems, and (2) advanced analysis techniques for technology and product evaluation. This article reports on highlights of the technical program.
Journal Articles
Finding the “When” and Improving the “Where” With Picosecond Time-Resolved LADA
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EDFA Technical Articles (2015) 17 (2): 10–17.
Published: 01 May 2015
... can be more than 100 times larger than LVP, with no crosstalk from signals outside of the critical path. In fact, it is possible to acquire timing and logic transition information by using an air gap lens on 28-nm-node technology. The complexity of a solid immersion lens system was shown...
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View articletitled, Finding the “When” and Improving the “Where” With Picosecond Time-Resolved LADA
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for article titled, Finding the “When” and Improving the “Where” With Picosecond Time-Resolved LADA
Laser-assisted device alteration (LADA) is an effective tool for identifying speed-limiting paths in ICs. When implemented with a continuous wave laser, it can reveal where the speed-limiting path resides but not when the slow (or fast) logic transition is occurring. To overcome this limitation, an enhanced version of the technique has been developed. This article discusses the capabilities of the new method, called picosecond time-resolved LADA, and explains how it complements the existing failure analysis toolset, facilitating faster resolution of issues and root-cause identification.
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