This article provides an introduction to scanning ion microscopy, explaining how it overcomes one of the biggest limitations of SEMs, namely the tradeoff between spatial resolution and depth of field, while also providing significantly more surface detail, a wide range of novel and familiar contrast mechanisms, and the potential for new microanalytical techniques that combine nanometer spatial resolution and single monolayer sensitivity. In addition to describing the capabilities of scanning ion microscopes, the article also addresses the issue of sample charging and the potential for physical damage that can result from ion beam irradiation.

Sample preparation is a critical step for dopant profiling of FinFET devices, especially when targeting individual fins. This article describes a sample-preparation technique based on low-energy, shallow-angle ion milling and shows how it minimizes surface amorphization and improves scanning capacitance microscopy (SCM) signals representative of local active dopant concentration.

This article describes how focused ion beam (FIB) technology is being used in combination with various other analytical tools for failure and yield analysis of MEMS devices. It provides examples showing how FIB is used with TEM analysis, AFM analysis, scanning acoustic microscopy, and scanning laser microscopy.

Atomic force microscopy has been a consistent factor in the advancements of the past decade in IC nanoprobing and failure analysis. Over that time, many new atomic force measurement techniques have been adopted by the IC analysis community, including scanning conductance, scanning capacitance, pulsed current-voltage, and capacitance-voltage spectroscopy. More recently, two new techniques have emerged: diamond probe milling and electrostatic force microscopy (EFM). As the authors of the article explain, diamond probe milling using an atomic force microscope is a promising new method for in situ, localized, precision delayering of ICs, while active EFM is a nondestructive alternative to EBAC microscopy for localization of opens in IC analysis.

Scanning capacitance microscopy (SCM) has proven to be an effective tool for investigating doping-related failure mechanism in ICs. The examples in this article show how the author used SCM to solve various problems including premature breakdown due to pattern misalignment, threshold voltage variations caused by poly gate doping anomalies, and source-drain leakage due to channeling effects.

Failure analysis is becoming increasingly difficult with the emergence of 3D integrated packages due to their complex layouts, diverse materials, shrinking dimensions, and tight fits. This article demonstrates several FA techniques, including high-frequency scanning acoustic microscopy, lock-in thermography, and FIB cross-sectioning in combination with plasma ion etching or laser ablation. Detailed case studies show how the various methods can be used to analyze bonding integrity between different materials, chip-to-chip interface structures, buried interconnect defects, and through-silicon vias at either the device or package level.

Several technology-focused User's Groups met at ISTFA 2014 to discuss current issues and advances in their areas of interest. This article summarizes key discussion points from the Contactless Fault Isolation User's Group, the Nanoprobing User's Group, the Sample Prep/3-D Package User's Group, and the FIB User's Group.

Transmission electron microscopy (TEM) plays an important role semiconductor process development, defect identification, yield improvement, and root-cause failure analysis. At the same time, however, certain artifacts of specimen preparation and imaging present barriers for linear scaling of TEM techniques. This article assesses these challenges and explains how electron tomography is being used to overcome them.

This article demonstrates the value of atomic force microscopes, particularly the different electrical modes, for characterizing complex microelectronic structures. It presents experimental results obtained from deep trench isolation (DTI) structures using SCM and SSRM analysis with emphasis on the voltage applied by the AFM. From these measurements, a failure analysis workflow is proposed that facilitates AFM voltage optimization to reveal the structure of cross-sectioned samples, make comparisons, and determine the underlying cause of failures.

Recent developments in automated image acquisition and metrology using transmission electron microscopy (TEM) and scanning transmission electron microscopy (STEM) have significantly improved the speed, precision, and usability of these techniques for controlling advanced semiconductor device manufacturing processes. As device dimensions have continued to shrink, these techniques may be needed to replace scanning electron microscopy (SEM) for the smallest critical dimension (CD) measurements. This article describes the use of automated S/TEM in a high-throughput CD-metrology workflow to support process development and control and explains how automated sample-preparation, data-acquisition, and metrology tools increase both throughput and data quality.

The 1997 National Technology Roadmap for Semiconductors (NTRS) and the 1999 International Technology Roadmap for Semiconductors (ITRS) include chapters outlining metrology needs for the silicon semiconductor industry during the next five years and beyond1. The grand challenges include affordable scaling, new materials and structures, and yield and reliability. Although additional requirements within these categories are detailed, it is often difficult for the analytical specialist or metrology equipment vendor to translate these grand challenges into detailed and meaningful roadmaps for success in analytical applications or instrument development. The path-to-impact of a single metrology activity is not always clear.

Scanning probe microscopy (SPM) refers to a suite of techniques that measure the interaction between a fine probe or tip and a sample in contact or close proximity. These interaction measurements allow the study of properties such as topology, magnetic and electric fields, capacitance, temperature, work function, and friction. The information obtained from SPM plays an important role in IC failure analysis.

The sixth FIB-SEM workshop was held March 1, 2013, in Cambridge, Mass. This article provides a summary of the event along with highlights from the 18 paper presentations.

This article provides a summary of each of the four User’s Group meetings that took place at ISTFA 2011. The summaries cover key participants, presentation topics, and discussion highlights from each of the following groups: Group 1, Focused Ion Beam; Group 2, 3D Packaging and Failure Analysis; Group 3, Finding the Invisible Defect; and Group 4, Nanoprobing and Electrical Characterization.

STEM-EBIC imaging, a nano-characterization technique, has been used in the study of electrically active defects, minority carrier diffusion length, surface recombination velocity, and inhomogeneities in Si pn junctions. In this article, the authors explain how they developed and built a STEM-EBIC system, which they then used to determine the junction location of an InGaN quantum well LED. They also developed a novel FIB-based sample preparation method and a custom sample holder, facilitating the simultaneous collection of Z-contrast, EBIC, and energy dispersive spectroscopy images. The relative position of the pn junction with respect to the quantum well was found to be 19 ± 3 nm from the center of well.

A team of semiconductor engineers recently developed a new fault localization method tailored for high-resistance faults. In this article, they discuss the basic principle of the technique and explain how they validated it for various test cases.

This article discusses the current state of large area integrated circuit deprocessing, the latest achievements in the development of automated deprocessing equipment, and the potential impact of advancements in gas-assisted etching, ion source alternatives, compact spectroscopy, and high-speed lasers.

Scanning microwave impedance microscopy (sMIM) is an electrical measurement technique that can be used to determine dopant profiles in semiconductor devices. This article describes the basic setup and implementation of the method and demonstrates its use in the cross-sectional analysis of NMOS power transistors.

Ex-situ lift out (EXLO) techniques rely on van der Waals forces to transfer FIB milled specimens to various types of carriers using a glass probe micromanipulator. This article describes some of the latest EXLO techniques for site specific scanning transmission electron microscopy, including the use slotted half-grids and vacuum-assisted lift out for plan-view analysis.

Scanning capacitance microscopy (SCM) and nanoprobing are key tools for isolating and understanding transistor level fails. In this case study, SCM and nanoprobing are used to determine the electrical characteristics of cluster-type failures in 14 nm SOI FinFET SRAM after standard FIB cross-section imaging failed to reveal any visible defects.