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mixed-signal ICs

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Journal Articles
EDFA Technical Articles (1999) 1 (3): 1–28.
Published: 01 August 1999
...Alan Righter This article discusses the challenges involved in testing analog and mixed-signal ICs and provides practical guidance and insights on how to deal with them. Copyright © ASM International® 1999 1999 ASM International analog components mixed-signal ICs mixed signal testers...
Journal Articles
EDFA Technical Articles (1999) 1 (4): 4–26.
Published: 01 November 1999
...Alan Righter; Alan Kennen Techniques used by failure analysts to provide proper stimuli to diagnose failures in mixed-signal ICs differ from routine digital IC tester stimuli. Mixed-signal parts not only require vector stimulus (i.e., set timing and frequency base), but also analog output sense...
Journal Articles
EDFA Technical Articles (2021) 23 (3): 8–12.
Published: 01 August 2021
...Mathias Heitauer; Martin Versen This article presents an automation workflow for the development of analog and mixed-signal devices similar to the two-stage process used for the design and verification of logic ICs. The use of a co-simulation interface makes it possible to build and verify failure...
Journal Articles
EDFA Technical Articles (2004) 6 (2): 6–11.
Published: 01 May 2004
...Richard S. Flores This article explains how the addition of FIB tunable circuits in critical paths on ICs can alleviate some of the challenges encountered during the implementation of mixed-signal ASICs. It walks readers through the implementation of a particular digital ASIC, explaining where...
Journal Articles
EDFA Technical Articles (2017) 19 (4): 22–34.
Published: 01 November 2017
.... Patent 5,086,477, 1992. 28. Calibre xRC Parasitic Extraction, Datasheet, Mentor Graphics,2004. 29. QRC, Extraction User Manual, Version 11, Cadence, 2015, p. 1. 30. Extraction Techniques for High-Performance, High-Capacity Simulation, Synopsys, 2009. 31. Dolphin Integration, Analog & Mixed Signal IC...
Journal Articles
EDFA Technical Articles (2010) 12 (4): 12–20.
Published: 01 November 2010
... in digital chains, but it may also be applied to detect a periodic analog signal with very low voltage swing, particularly in a noisy environment. Accessibility of a failure-related signal can be realized by test-bus concepts, which are often integrated in modern mixed-signal devices. In contrast to the lock...
Journal Articles
EDFA Technical Articles (2007) 9 (1): 20–23.
Published: 01 February 2007
...Michael Strizich Voltage contrast followed by electron beam induced current imaging is an effective approach for isolating IC failures. This article briefly reviews the physics of signal generation for both techniques and presents several examples illustrating how this powerful combination...
Journal Articles
EDFA Technical Articles (1999) 1 (2): 1–20.
Published: 01 May 1999
... in SPM, particularly if the signals come from different [ levels of metals in an IC. R SPM, however, offers excellent spatial resolution, nomi- ,I 3 b ~ally in nanomete~ r~ge. This unparalleled spatial re.solu- Fig. 2: Topology images of a planaJized n-channel tran- hon may offer a dlShnct advantage over...
Journal Articles
EDFA Technical Articles (2009) 11 (3): 46–47.
Published: 01 August 2009
... letters to designate successive revisions, and sometimes it is revision 1d that goes to mar- Table 1 Failures in first silicon Classification Logic Analog Signal Clock Reliability Mixed signal Power Slow paths Fast paths Infrared drop Firmware Other Source: Adapted from Ref 1 Failures, % 43 19 16 13 11 10...
Journal Articles
EDFA Technical Articles (2009) 11 (2): 6–14.
Published: 01 May 2009
... Semiconductors), where he is currently employed as a principal failure analysis engineer in the FA-Innovation Group. He specializes in analog and mixed-signal techniques for IC debugging. 14 Electronic Device Failure Analysis ...
Journal Articles
EDFA Technical Articles (2005) 7 (3): 14–21.
Published: 01 August 2005
... p-FET1 p-FET2 Emission Emission Emission Emission Volume 7, No. 3 Electronic Device Failure Analysis 15 CMOS IC Diagnostics (continued) Signal Integrity Measurements Typical dependences of the LEOSLC from various electrical parameters are presented in Ref 1 for an n-FET of a 130 nm generation...
Journal Articles
EDFA Technical Articles (2010) 12 (3): 4–8.
Published: 01 August 2010
... with Pulsed Laser Digital Signal Integration Algorithm, Int. Symp. Test. and Failure Analysis (ISTFA), 2006, pp. 234-38. 9. Z. Qian, C. Brillert, and C. Burmer: Mixed Frequency Detection of Thermal Laser Stimulation (MF-TLS) and Its Application in Failure Analysis, Int. Symp. Test. and Failure Analysis...
Journal Articles
EDFA Technical Articles (2016) 18 (3): 54–55.
Published: 01 August 2016
... in die-to-die bandwidth. Recently, 3-D integrated circuits (ICs) that employ vertical through-silicon vias (TSVs) for connecting each die have been proposed. It is an alternative solution to existing package-on-package and system-in-package processes. This column addresses some of the challenges...
Journal Articles
EDFA Technical Articles (2017) 19 (1): 26–40.
Published: 01 February 2017
.... Strong preference should be given to mixed-signal IC design, test, and layout understanding. AN FA ENGINEER SHOULD BE EDUCATED TO THE ACADEMIC LEVEL OF A MASTER'S OR Ph.D. DEGREE IN TECHNICAL SCIENCES AND THEN MUST SEEK CONTINUOUS LEARNING AND TRAINING. Furthermore, an FA engineer should have...
Journal Articles
EDFA Technical Articles (2010) 12 (4): 22–27.
Published: 01 November 2010
... information for defect localization or device characterization. Defect localization is still possible and can be done immediately or after interpretation and correlation of various parameter mappings. Parametric-mode DLS also offers the capability to localize defects inside analog and mixed-mode ICs, which...
Journal Articles
EDFA Technical Articles (2014) 16 (2): 26–32.
Published: 01 May 2014
... signal-to-noise ratio (SNR) levels in LVI signals can be overcome by using a differential dual-phase interferometric imaging method combined with an aSIL (Fig. 3, 4). In interferometric LVI, the reflected probe beam, modulated weakly by the charge carriers, is mixed separately with two reference beams...
Journal Articles
EDFA Technical Articles (2012) 14 (3): 4–11.
Published: 01 August 2012
.... These developments cannot be disregarded in a discussion about the consequences of 3-D. Main Trends Faced by Analytical Labs due to SiP and Their Consequences for FA Instrumentation Diversity of Technology A complex SiP can contain a mix of various IC technologies specialized for analog or digital applications...
Journal Articles
EDFA Technical Articles (2003) 5 (4): 5–10.
Published: 01 November 2003
... for integration of chip, package, and board design; three-dimensional capability; integration of RF/mixed signal; and CMOS. Faster thermal analysis tools that are linked to mechanical analysis tools are key to ensuring the success of this integrated approach. Cu/Low-k The key challenge here is improving...
Journal Articles
EDFA Technical Articles (1999) 1 (4): 1.
Published: 01 November 1999
... ER4 and Developments in the Electronics Failure Analysis Industry NOVEMBER 1999 CONTENTS Industry News 2 Failure Analysis A Brief History of ISTFAof a Mixed-Signal .. .4 Contract Lab Review . . . . 5 Roadmaps 6 ANew Preferential Etch .. 9 Secondary Ion Mass Spectrometry, SIMS. . . .. 14 Energy...
Journal Articles
EDFA Technical Articles (2017) 19 (4): 36–44.
Published: 01 November 2017
...: Multimodal Imaging Techniques and Strategies for Mixed Signal Integrated Circuits, Government Microcircuit Applications and Critical Technology Conference (GOMACTech), 2014. E.M. Lavely, Y.-S. Lai, and K. Gopalakrishnan: Joint Inversion of MultiMode Data for IC Estimation, Government Microcircuit...