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mixed signal testers

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Journal Articles
EDFA Technical Articles (1999) 1 (3): 1–28.
Published: 01 August 1999
...Alan Righter This article discusses the challenges involved in testing analog and mixed-signal ICs and provides practical guidance and insights on how to deal with them. Copyright © ASM International® 1999 1999 ASM International analog components mixed-signal ICs mixed signal testers...
Journal Articles
EDFA Technical Articles (1999) 1 (4): 4–26.
Published: 01 November 1999
...Alan Righter; Alan Kennen Techniques used by failure analysts to provide proper stimuli to diagnose failures in mixed-signal ICs differ from routine digital IC tester stimuli. Mixed-signal parts not only require vector stimulus (i.e., set timing and frequency base), but also analog output sense...
Journal Articles
EDFA Technical Articles (2010) 12 (4): 12–20.
Published: 01 November 2010
... Spectral: no reference required Frequency measures outside stimulation frequencies (sensitivity) Volume 12, No. 4 13 Advanced Dynamic Laser-Stimulation Methods (continued) mately 70 clock cycles with a frequency of 1 MHz. This pattern runs in a loop at a tester. The input signal applied to the mixed...
Journal Articles
EDFA Technical Articles (2003) 5 (3): 5–11.
Published: 01 August 2003
... observability of the internal signal state while the chip continues to operate. Designs may use a mix of both types, with nondestructive scan allowing the debug engineer to pinpoint an area of failure to a small region, whereupon more extensive destructive scan can be used to observe more signals. The ratio...
Journal Articles
EDFA Technical Articles (2005) 7 (3): 22–28.
Published: 01 August 2005
... State University, Raleigh, N.C. He joined the Intel Microprocessor Design Group in 1999 and has been part of the mixed-signal design team since then. He has worked on the Pentium III and Pentium 4 processor families. His main interests are in thermal sensor, I/O, and PLL design. He holds seven U.S...
Journal Articles
EDFA Technical Articles (2017) 19 (4): 22–34.
Published: 01 November 2017
... and a process fix was implemented to resolve the failure. Although all nets in a typical combinational logic circuit should be clearly defined, this is a classic example of a design bug escape in presilicon validation. This is a common phenomenon, especially in complex mixed-signal designs.[31] LAYOUT-DESIGN...
Journal Articles
EDFA Technical Articles (2005) 7 (3): 14–21.
Published: 01 August 2005
...-frequency measurement techniques, electron beam circuit testing, radiation-device interactions, low-temperature electronics, and SOI technology. His current activities include designing circuits for on-chip characterization, investigations into substrate coupling in mixed-signal and RF circuits, studying...
Journal Articles
EDFA Technical Articles (2007) 9 (3): 18–20.
Published: 01 August 2007
... Semiconductor) in 1995. At Freescale, he works as an engineer at the Arizona Product Development Analysis Lab in Tempe, Ariz., specializing in failure analysis of power analog and mixed-signal devices. Mr. Kolasa is a member of EDFAS and has been active in the ISTFA symposium as a session chair and peer...
Journal Articles
EDFA Technical Articles (2021) 23 (2): 33–37.
Published: 01 May 2021
... introducing the topic: Lock-in Thermography: Static and Dynamic Applications, 3D Packaging, where he discussed the challenges for failure analysis on multi-stack dies. By implementing a tester-based solution in conjunction with the lock-in thermography camera receiving the stimulus of the tester, shorts...
Journal Articles
EDFA Technical Articles (2016) 18 (4): 4–14.
Published: 01 November 2016
... (SDL) in Mixed Signal and Analog ICs, Proc. Int. Symp. Test. Fail. Anal. (ISTFA), 2011, p. 158. 5. R. Guo and S. Venkataraman: A Technique for Fault Diagnosis of Defects in Scan Chains, Proc. Int. Test Conf. (ITC), 2001, p. 268. 6. Z. Song, S.P. Neo, T. Tun, C.K. Oh, and K.F. Lo: Diagnosis...
Journal Articles
EDFA Technical Articles (2020) 22 (1): 30–41.
Published: 01 February 2020
..., GlobalFoundries ISTFA 2019 OUTSTANDING PAPER: Infrared Lock-In Thermography: From Localization of Low Power and Masked Defects to Absolute Temperature Mapping for Product Debug Jeroen Jalink, NXP Semiconductor ISTFA 2019 ATTENDEES BEST PAPER: Machine Learning Assisted Signal Analysis in Acoustic Microscopy...
Journal Articles
EDFA Technical Articles (2023) 25 (2): 16–28.
Published: 01 May 2023
... and mixed-signal designs, and he is an author and co-author of several papers on software-based fault localization and related topics. He gave tutorials on fault localization both company internal and during the ETS and GMM symposia. He is involved in projects developing software applications for failure...
Journal Articles
EDFA Technical Articles (2005) 7 (1): 16–24.
Published: 01 February 2005
... case, the all-0 s pattern) of the middle scan chain, but instead it is 11111111110000000000 This indicates exactly where the break (stuck-at) is (the output of the 11th bit from the end, which may be the bit, bit <10>, or the scan-data-out signal route). The reset technique does not always guarantee...