Search Results for innovation

The EDFAS Board of Directors (BOD) has undertaken an initiative to help drive the development of failure analysis methods as leading-edge semiconductor technology approaches the sub-20 nm regime. To streamline efforts and leverage existing work, the BOD recently surveyed its constituency to gauge their opinions on the capability gaps identified by the Sematech councils. This article briefly discusses the methodology of the survey and provides a summary of the responses along with key findings.

This column identifies promising new failure analysis technologies based on the papers published in recent ISTFA conferences. The purpose of the column is not to select the "best of the best," but rather to understand the technologies that have been developed and adopted to solve the ever-growing challenges in failure analysis.

The Package Innovation Roadmap Council (PIRC) was established as part of the Failure Analysis Technology Roadmap activity at the direction of the EDFAS Board. This column provides an overview of a technical paper by the PIRC that highlights recent innovations, technology gaps, and future development trends in package fault isolation and failure analysis. The paper focuses on three main categories: 1) Artificial intelligence (AI) applications, 2) Sample handling, and 3) FA tool robustness.

Electronic components and assemblies are subjected to temperature variations at every stage of life, resulting in the buildup of internal stress. This article explains how such stress contributes to failures and introduces a measurement technique that allows users to visualize stress distributions and assess their effects on lifetime and reliability. Application examples illustrating the capabilities of the new topography and deformation measurement approach are also presented.

Ex-situ lift out (EXLO) techniques rely on van der Waals forces to transfer FIB milled specimens to various types of carriers using a glass probe micromanipulator. This article describes some of the latest EXLO techniques for site specific scanning transmission electron microscopy, including the use slotted half-grids and vacuum-assisted lift out for plan-view analysis.

The causes of failure in flip-chip packaged devices are often found at the interface between the die and package. Exposing the site of interest usually entails some form of mechanical cross-sectioning with the sample embedded in an epoxy puck. This article brings attention to some of the drawbacks with the current approach and presents a solution in the form of a redesigned puck. As test results show, the new puck significantly reduces polishing time, and when cast with a conductive epoxy, minimizes charging artifacts and image distortion during SEM analysis. It also facilitates easy sample removal for subsequent analysis.

This article describes recent advancements in multi-probe sensing schemes and development of a tomographic atomic force microscopy tool for materials research and failure analysis.

This column provides some thoughts on the cultivation of ideas and the conditions that must exist in a failure analysis laboratory to allow fledgling methods to become deeply rooted, flourishing techniques. As an example, the author recounts the introduction and subsequent development of resistive interconnect localization (RIL) is his lab.

This column discusses the effect of changes in the U.S. patent process and explains how they benefit failure analysts. He also relates one of his own experiences with filing for a patent based on an observation he and a colleague made in a semiconductor FA lab.

In this article, the author considers the factors that make an idea patentable and explains where ideas that may lead to patents are likely to originate.

This article discusses the current state of large area integrated circuit deprocessing, the latest achievements in the development of automated deprocessing equipment, and the potential impact of advancements in gas-assisted etching, ion source alternatives, compact spectroscopy, and high-speed lasers.

This article presents and evaluates a calibration method that significantly improves the spectral information that can be extracted from photon emission signals obtained from semiconductor devices. Step-by-step instructions are given for calibrating photon emission microscopes for specific measurements such as device parameters and material band gap. The article also discusses the types of errors that can occur during calibration. Although the procedure presented is used on InGaAs sensors, it applies to all common photon emission detectors.

In 2023, the CHIPS Metrology Program was stood up to support the CHIPS Act’s provision for NIST to establish a metrology program that will strengthen the U.S. semiconductor industry through multidisciplinary research and development efforts. Metrology is needed to benchmark, control, and improve manufacturing processes, and plays a crucial role in semiconductor manufacturing. This article describes the four initiatives aligned to support the EDFAS community: its R&D portfolio, the CHIPS Metrology Small Business Innovation Research (SBIR) program, the CHIPS Metrology Community, and the Metrology to Innovate in Semiconductors (METIS) data exchange.

By providing timing information and throughput as device complexities and operating frequencies were rapidly increasing, the e-beam prober, which integrated CAD navigation and waveform measurements while enabling the user to almost disregard the technology “under the hood,” was the required tool for IC design debug from the late 1980s to the early 2000s. The history, successes, innovations, mistakes, and possible future of this workhorse tool are visited and described.

Acoustic microimaging has advanced over the past few years in response to the growing use of thinner silicon die and innovative packaging designs. This article reviews the basic principles of acoustic imaging technology and describes some of the applications made possible by improvements in spatial resolution, focal length, F-number, and water couplant temperature control. It also discusses common imaging challenges and explains how they can be resolved.

Transmission electron microscopes have been improved in various ways over the past two decades, giving rise to new characterization techniques. Among the innovations discussed in this article are the introduction of field emission guns, the incorporation of CCD cameras and X-ray detectors, and the use of lens correction systems. Such improvements have had a significant impact on failure analysis through the emergence of new TEM techniques, including precession electron diffraction for grain and strain analysis, noise reduction processing for low dose EELS mapping of ultra-low-k materials, and EDX tomography for elemental 3D imaging of defects on a nanometer scale.

Failure analysis has become a critical enabler of semiconductor technology innovations. Logic and memory scaling continues at an unabated pace with new materials and transistor architectures being introduced. The integration of advanced packaging technologies like chiplets, 2.5D, and 3D in mainstream devices is exploding. To address these challenges, a new industry-wide FA Technology Roadmap was created and approved by the EDFAS Board in 2020. This column discusses the planned next steps in the Roadmap project.

This column describes the structure and process being followed by the councils working on the Failure Analysis Technology Roadmap at the direction of the EDFAS Board. The FA Roadmap activity was recently restructured to establish three Councils: Die-Level Roadmap Council (DLRC), Package Innovation Roadmap Council (PIRC), and an FA Future Roadmap Council (FAFRC). To incorporate a common FA workflow, the DLRC will host two separate domain teams: Isolation and Post-Isolation Domain. The column describes the FA Roadmap work conducted at the ISTFA 2022 Conference and activities planned for 2023.

This article describes two innovative methods that can significantly improve the resolution of SEM imaging: scanning transmission electron microscopy in a scanning electron microscope (STEM-in-SEM) and forward-scattered electron imaging (FSEI). Both methods can be implemented in any SEM using special sample holders. No other modifications are required. Test results presented in the article show that 1 to 2 nm resolution is possible in thin sections, uncoated polysilicon gates, and photoresist.

Quantum diamond microscopy is an innovative nondestructive tool. This article describes detailed operations from a failure analyst's perspective, showing how the technique integrates into standard workflows. Case histories are included comparing its performance to established FA methods and highlighting QDM's specific advantages.