Four-dimensional scanning transmission electron microscopy (4D-STEM) is a spatially resolved electron diffraction technique that records the electron scattering distribution at each sampling point. 4D-STEM provides researchers with information that can be analyzed in a multitude of ways to characterize a sample’s structure, including imaging, strain measurement, and defect analysis. This article introduces the basics of the technique and some areas of application with an emphasis on semiconductor materials.

Four-dimensional scanning transmission electron microscopy (4D-STEM) is a spatially resolved electron diffraction technique that records the electron scattering distribution at each point of the electron beam raster, thereby producing a four-dimensional dataset. This second installment of this series presents applications of 4D-STEM, including measurements of crystal orientation and phase, short- and medium-range order, and internal electromagnetic fields.

Four-dimensional scanning transmission electron microscopy (4D-STEM) is a spatially resolved electron diffraction technique that records the electron scattering distribution at each point of the electron beam raster, thereby producing a four-dimensional dataset. The final article in this series covers ptychography, a form of computational imaging that recovers the phase information imparted to an electron beam as it interacts with a specimen.

This article provides a brief overview of STEM-in-SEM, discussing the pros and cons, recent advancements in detector technology, and the emergence of 4D STEM-in-SEM, a relatively new method that uses diffraction patterns recorded at different raster positions to enhance images offline in selected regions of interest.

This article presents the principles of scanning thermal microscopy (SThM) instruments and their potential uses for the local thermal analysis of passive and active electronic components and devices. Three examples are given that demonstrate the SThM’s ability to perform thermal analysis on a microscopic scale. The results suggest that SThM could be used as a powerful tool for analyzing printed circuit boards and electronic devices with high spatial resolution, during the development cycle, failure analysis during and after manufacture, and during operation.

Scanning probe microscopy (SPM) is widely used for fault isolation as well as diagnosing leakage current, detecting open circuits, and characterizing doping related defects. In this article, the author presents two SPM applications that are fairly uncommon but no less important in the scope of failure analysis. The first case involves the discovery of nano-steps on the surface of high-voltage NFETs, a phenomenon associated with stress-induced crystalline shift along the (111) silicon plane. In the second case, the author uses an AFM probe in the conductive mode to correlate tunneling current distribution with hot spots in high-k gate oxide films, which is shown to be a better indicator of oxide quality than rms surface roughness.

X-ray ptychography, as recent studies show, has the potential to bridge the gap that currently exists between conventional X-ray imaging and electron microscopy. This article covers the evolution of the technology from basic 2D imaging to computed tomography to 3D ptychographic X-ray laminography (PyXL) with zoom. To demonstrate the capabilities of PyXL, a 16-nm FinFET logic IC was mechanically polished to a thickness of 20 µm and several regions were imaged at various levels of resolution.

Semiconductor trends, as embodied in the International Technology Roadmap for Semiconductors (ITRS), provide a guide for the challenges facing the failure analysis community. This process is a risk assessment of key features forecast for the impact of future technologies on failure analysis. The technical challenges fall primarily into two categories: failure site isolation and physical analysis. The failure site isolation challenges are largely driven by the device complexity and reduced accessibility of circuit nets. Additional challenges arise due to the increase in device operating speed and pin count. The challenges in physical analysis are driven primarily by smaller device feature sizes and by the host of new materials being introduced. In addition to the technical challenges, infrastructure changes are also likely to occur. The industry paths for addressing these challenges are discussed.

This article provides a summary of the presentations given at the four User’s Group meetings at ISTFA 2012. Each user group focused on one of the following topics: nanoprobing, contactless fault isolation, focused ion beam, and sample preparation.

This article provides a summary of each of the four User’s Group meetings that took place at ISTFA 2011. The summaries cover key participants, presentation topics, and discussion highlights from each of the following groups: Group 1, Focused Ion Beam; Group 2, 3D Packaging and Failure Analysis; Group 3, Finding the Invisible Defect; and Group 4, Nanoprobing and Electrical Characterization.

This article compiles summaries of User Group meetings held at ISTFA 2013, including the Contactless Fault Isolation User’s Group, the Focused Ion Beam User’s Group, the Sample Prep/3D Package User’s Group, and the Nanoprobing User’s Group. For each meeting, a brief synopsis of the presentations and subsequent dialog is provided.

Failure analysis labs are fairly well equipped for dealing with shorts and leakages in stacked-die packages, but are at a disadvantage when it comes to opens, particularly those at the die or die interconnect level. This article presents a new FA technique that has the potential to make up for this shortcoming. The new method, called space domain reflectometry (SDR), is based on radio-frequency magnetic current imaging, and as the authors show, is capable of accurately locating a dead open in a double-stacked BGA package, even when the full stack is encapsulated in molding compound.

This article summarizes major discussion points from four User’s Group meetings held at the ISTFA 2009 conference. The topics addressed are "Optical Techniques: Growth and Limitations," "Resolution of Nanoprobing for 45 nm and Beyond: New Challenges," "FIB," and "Fast ASIC Fault Isolation: Efficiency and Accurate Resolution of Software-Based Fault Isolation."

IBM engineers have developed a holographic imaging technique, called dual-lens electron holography, that provides high spatial resolution and field of view without compromising signal-to-noise ratio. This article reviews the basic principles of the new method and provides several examples of its use. The first few examples demonstrate the junction profiling capabilities of the new method which, in one case, helps to explain why shallow junction devices are made with raised source-drain regions. In the other examples, dual-lens holography is used for strain mapping, in one case, to study strain distributions in sigma-shaped SiGe devices, and in another, to provide evidence that stress memorization occurs in dislocations in the source-drain region of nFET devices.