This article describes a new technique for measuring temperatures in GaN HEMTs. The method is based on Raman spectroscopy and the use of cerium oxide particles that act like micro-Raman thermometers when scanned with a UV laser. As the article explains, phonon line shifts due to Raman scattering are used to estimate the temperature of GaN layers while surface temperatures are obtained through the cerium oxide particles. The results presented also verify that the particles, which are distributed over semiconductor and metal surfaces, do not modify the electric characteristics of the GaN devices.

The 1997 National Technology Roadmap for Semiconductors (NTRS) and the 1999 International Technology Roadmap for Semiconductors (ITRS) include chapters outlining metrology needs for the silicon semiconductor industry during the next five years and beyond1. The grand challenges include affordable scaling, new materials and structures, and yield and reliability. Although additional requirements within these categories are detailed, it is often difficult for the analytical specialist or metrology equipment vendor to translate these grand challenges into detailed and meaningful roadmaps for success in analytical applications or instrument development. The path-to-impact of a single metrology activity is not always clear.

This article discusses the development of resonance-enhanced AFM-IR spectroscopy and demonstrates its effectiveness on silicon test wafers with nanoscale skin particles and polyester contaminants.

Virtually all semiconductor materials exhibit Raman scattering which results in a frequency shift in photon energy. In this article, the authors explain how they harness this mechanism to measure the temperature of submicron structures and thereby produce high-resolution temperature maps. They review the basic theory of Raman scattering and present application examples involving high-bandgap materials as well as silicon devices.

The Product Analysis Forum (PAF), sponsored by the Quality Council of SEMATECH, has been chartered to facilitate the ongoing development of tools and techniques for semiconductor characterization and failure analysis. Drawing on input from industry experts, universities, and national laboratories, the PAF has identified critical needs in three areas: software fault isolation, backside fault isolation, and deprocessing & inspection. This article discusses the current state of deprocessing and inspection technology and provides insights into how some of the future challenges will be addressed.

Optical second-harmonic generation (SHG) is a noninvasive technique that provides information about interface properties and crystal defects. This article demonstrates the use of SGH in the study of high-k dielectrics, silicon-on-insulator structures, compound semiconductors, and through-silicon vias.

Counterfeit electronic parts have become a significant cause of concern in the electronics part supply chain. Several factors that contribute to the targeting of the electrical, electronic, and electromechanical (EEE) parts market by counterfeiters include parts obsolescence, extended lead times, the absence of verification tools, the availability of scrapped or salvaged parts, and the high costs associated with inspection/testing procedures. This article reports on the status of efforts by the G-19 Committee of SAE International to develop standards in response to increasing numbers of counterfeit parts in the supply chain.

Positron spectroscopy can identify defects deep within metals and semiconductors with a resolution better than a single atomic lattice site. This article discusses the basic principles and implementation of positron annihilation spectroscopy and a key development that makes it more a more useful tool for semiconductor applications.

It seems that scaling of chip technology according to Moore’s Law will continue for digital functionalities (logic and memory); however, increasing system integration on chip and package levels, called “More than Moore,” has been observed in the past several years. This strong trend in the worldwide semiconductor industry enables more functionality, diversification, and higher value by creating smart microsystems. This article discusses the many challenges faced in FA of 3-D chips, where well-staffed and equipped FA labs are essential. Furthermore, FA is becoming an important strategic enabling factor for new products, not just another “cost factor.”

A noninvasive thermal imaging approach based on the thermoreflectance principle is proposed for analyzing advanced semiconductor devices. Several examples illustrate the value of this approach in detecting thermal anomalies and defects missed by other techniques.

This article discusses some of the early uses of emission microscopy in semiconductor device failure analysis and the challenges that were overcome to make it the invaluable tool it is today. One of the impediments early on was a misconception that silicon cannot emit light when, in fact, it has several light emission mechanisms that have proven useful in electron microscopy. One such mechanism, avalanche luminescence, occurs in junctions during reverse breakdown and is useful for resolving low breakdown voltage and problems with ESD protection circuits. Other light emission mechanisms discussed in the article include forward bias emission, MOS transistor saturation, and dielectric luminescence, which is used to examine oxide test structures and detect oxide defects.

Chip-level 3D integration, where chips are thinned, stacked, and vertically interconnected using TSVs and microbumps, brings as many challenges as it does improvements, particularly in the area of failure analysis. This article assesses the capabilities of various FA techniques in light of the challenges posed by 3D integration and identifies current shortcomings and future needs.

The complexity of sample preparation and deprocessing has risen exponentially with the emergence of 2.5-D and 3D packages. This article provides answers and insights on how to deal with the challenges of increasingly complex semiconductor packages. After identifying pressing issues and potential bottlenecks with state-of-the-art FA flows, the authors present two case studies demonstrating the capabilities of electro-optical terahertz pulse reflectometry (EOTPR), plasma FIB milling, and 3D X-ray imaging. The FA results confirm the potential of all three techniques and indicate that a fully nondestructive integration flow for 3D packages may be achievable with further development and optimization.