Conventional backside imaging takes advantage of silicon’s transmission of light which, based on the Plank relation ( E g = hc/ λ ), occurs at wavelengths greater than 1 µm. Because of diffraction, the lateral spatial resolution of backside imaging techniques is limited to about half the wavelength of the light source used, which is far too coarse to isolate faults in a typical IC. In this article, the authors explain how they overcome this limitation by reprofiling the backside of the silicon, forming spherically shaped domes. The raised convex surfaces act as solid immersion lenses that are shown to improve spatial resolution by nearly an order of magnitude. The degree of improvement is evaluated using backside emission microscopy (EMS), optical beam induced current (OBIC) imaging, and laser voltage probing (LVP) and the results are presented in the article.

Single contact optical beam induced currents (SCOBIC) is a variation on the OBIC failure analysis technique that requires only one point of contact with the junction being examined. This article discusses the basic principles of this new method and how it compares with OBIC in terms of measurement performance. It also presents examples showing how SCOBIC can be used to analyze CMOS devices from the front and back side without need for complex FIB and microprobing procedures.

This article discusses the use of scanning-beam techniques such as EBIC, IBIC, and OBIC to optimize the design of edge-termination structures in vertical GaN and AlGaN power diodes.

Scanning laser-SQUID microscopy is a new electrical inspection and failure analysis technique that can detect open, high-resistance, and shorted interconnects without electrical contact in areas ranging in size from a few square microns to an entire die. This article describes the setup of a prototype laser-SQUID system, explaining how it works and how it compares to other nondestructive defect localization techniques. It presents application examples in which laser-SQUID microscopy is used to locate gate oxide shorts to within 1.3 μm and detect IC defects prior to bond-pad pattering and after bonding and packaging. It also includes a series of images acquired from a board-mounted chip with fields of view ranging from 5 x 5 mm down to 50 x 50 μm.

Flip chip mounted devices are difficult debug using conventional FIB tools because their internal circuitry is not easily accessible. New flip chip focused ion beam (FC FIB) systems overcome this limitation, however, making it possible to access circuits from the backside through the bulk silicon. In this article, the authors explain how they used the new system to gain access to signal lines for backside waveform acquisition. They also describe some of the procedures they developed to repair and modify flip chip circuits from the backside and prepare cross-section samples from the backside for failure analysis and characterization.

This column provides a ten-year retrospective on laser-based fault isolation techniques and the important role of laser signal injection microscopes.

The power of scanning optical microscopes (SOMs) lies in their ability to direct a small spot of light into an IC, producing photocarriers and heat in a localized area of the circuit. Photonic and thermal energy affect the I-V characteristics of the circuit in different ways, depending on the presence of defects and local material properties. This article explains how light beams interact with semiconductors and metals and how they influence the I-V characteristic of circuits and devices. It describes the basic physics of SOM measurements, provides examples of static and dynamic SOM techniques, and discusses emerging applications.

This is a case study of an illumination-sensitive failure. Due to the unavailability of a scanning optical microscope, fault isolation was performed using a different approach based on available equipment. Through a combination of emission microscopy, FIB isolation, mechanical probing, and in-depth circuit analysis, the root cause and failure mechanism were determined.

This article provides a qualitative overview of several new defect localization techniques, including charge-induced voltage alteration (CIVA), light-induced voltage alteration (LIVA), thermally-induced voltage alteration (TIVA), and Seebeck effect imaging (SEI). It explains how each method works in terms of the physics of signal generation and the types of images they produce. It also includes a summary highlighting the similarities and differences of each technique.

In most cases, microelectronic failure analysis is rooted in the observation of voltage, either as logic levels or as time-based waveforms. This is due largely to the ease of making such measurements. As a result, current measurement is often overlooked. This article discusses aspects of current measurement that can be used during fault localization, often providing information that cannot be obtained by other means.

In many companies, failure analysis (FA) has evolved to mean much more than analyzing a part from yesteryear and filing a report simply to satisfy a requirement. Failure analysis engineers frequently interface with design, test, and product engineering and are an integral part of yield improvement. This article addresses several common misperceptions about the failure analysis process.

A new way to detect gate oxide defects has been developed. The method, as the article explains, is based on wet chemical etching and is particularly effective for devices with floating gates. Test samples with exposed poly-Si gates are placed in a KOH:H 2 O solution and a voltage is applied to the silicon substrate. At a certain voltage, normal gates begin to etch, while those shorted to the substrate through gate oxide defects develop an anodic oxide and thus remain unetched. This method has proven effective in assessing gate oxide integrity without direct observation of the oxide, which requires complicated deprocessing and a lot of time. It also reveals electrical characteristics of gate oxides that are difficult to identify by conventional physical analysis.

This article provides insights into the nature of IDDQ and timing defects and the challenges they present to failure analysts based on the findings of a Sematach study.

This article provides a high-level review of the tools and techniques used for backside analysis. It discusses the use of laser scanning and conventional microscopy, liquid and solid immersion lenses, photon emission microscopy (PEM), and laser-based fault isolation methods with emphasis on light-induced voltage alteration (LIVA). It explains how laser voltage probing is used for backside waveform acquisition and describes backside sample preparation and deprocessing techniques including parallel polishing and milling, laser chemical etching, and FIB circuit edit and modification.

This article describes a novel method for improving image resolution achieved using time-resolved photon emission techniques. Instead of directly generating images from photon counting, all detected photons are displayed as a point cloud in 3D space and a new higher-resolution image is generated based on probability density functions associated with photon distributions. Unsupervised learning algorithms identify photon distribution patterns as well as fainter emission sources.