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C-V curves
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Journal Articles
EDFA Technical Articles (2017) 19 (4): 12–20.
Published: 01 November 2017
... concentrations, and nanoscale C-V curves for different semiconductor and dielectric materials. It also explains how measured results compare with theoretical models, confirming the validity of each approach. Scanning microwave impedance microscopy (sMIM) is a relatively new method for making electrical...
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Scanning microwave impedance microscopy (sMIM) is a relatively new method for making electrical measurements on test samples in AFMs. This article presents examples in which sMIM technology is used to measure dielectric coefficients, doping concentrations, and nanoscale C-V curves for different semiconductor and dielectric materials. It also explains how measured results compare with theoretical models, confirming the validity of each approach.
Journal Articles
EDFA Technical Articles (2001) 3 (2): 15–17.
Published: 01 May 2001
..., base, collector, and polycontact structures. VCmin qualitatively maps the flatband voltage and is black for ntype and white for p-type. A zoomed portion of this image (bottom) is shown with the C(V) curves plotted in each pixel serving to estimate the depletion width. Image size is 3,000 x 1,500 nm2...
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Scanning capacitance spectroscopy (SCS) is a new way to use a scanning capacitance microscope (SCM) to delineate pn junctions in silicon devices. SCS produces two-dimensional pn junction maps with features as small as 10 nm. It can also estimate the pn junction depletion width and hence doping levels near the junction. This article explains how SCS and SCMs allow a whole new regime of doping-related phenomena to be explored in Si devices and ICs.
Journal Articles
EDFA Technical Articles (2005) 7 (3): 22–28.
Published: 01 August 2005
... is needed. Historically, this has been done by pico-probing or, nondestructively, by the low yield analysis (LYA) test mode DFT technique. Upon obtaining transistor I-V curves from reference and defective SRAM cells, simulations are performed to correlate the curves to known defect mechanisms.[3] Because...
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Parametric analysis of SRAM cells is widely used to locate faults and analyze device failures, but the pico-probing and bit-line multiplexing required for data acquisition is becoming increasingly difficult. This article explains how the addition of an on-die low-yield analysis circuit eliminates the problem. The simplicity of the measurement circuit and the potential to use a known library of curves, makes low-yield analysis one of the most versatile DFT techniques for cache fault isolation.
Journal Articles
EDFA Technical Articles (2000) 2 (2): 12–24.
Published: 01 May 2000
... of the resistance degradation while varying the voltage enabled the voltage acceleration factor to be calculated. This was done from 50 V to 330 V by monitoring and recording the length of time required for the capacitor current to reach 10 nA. The leakage scale on the curve tracer monitored and controlled...
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The curve tracer is a versatile lab instrument that can provide electrical characterization data for a variety of analyses. A curve tracer helped analyze a ceramic capacitor identifying leakage sites, acceleration factors, radiation sensitivity, and failure mechanism.
Journal Articles
EDFA Technical Articles (2005) 7 (2): 14–19.
Published: 01 May 2005
..., the plate voltage, the substrate, and the source voltage at the trench are grounded. Figure 4 shows the input characteristic IDS (VGS) at VDS = 1.5 V and T = 85 °C for the structure in Fig. 3. The different VDT voltages are distinguished by different line symbols. The threshold shift is clearly observable...
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Weak open contacts are common in DRAM cell arrays where they act as a resistance between the cell capacitor and wordline transistor. This article discusses the role of weak open contacts in DRAM failures, the factors that influence their effect on read and write operations, and the complexities involved in assessing potential problems.
Journal Articles
EDFA Technical Articles (2024) 26 (2): 22–30.
Published: 01 May 2024
... ARRAY Norelislam El Hami1, Aicha Koulou2, Maria Zemzami3, and Abdelkhalak El Hami4 1Science and Engineering Laboratory, ENSA, University Ibn Tofail, Kenitra, Morocco 2EST, University Ibn Tofail, Kenitra, Morocco 3ENSAM, Mohamed V University, Rabat, Morocco 4Laboratory of Mechanics of Normandy, INSA...
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The influence of electric current flow and electrically induced Joule heat on thermal stress for weld joint cracks at both interfaces is still not fully comprehended. This article investigates the effect of subjecting the ball grid array package to a cyclic current input. Current density, Joule effect, and temperature curves are examined.
Journal Articles
EDFA Technical Articles (2020) 22 (1): 20–25.
Published: 01 February 2020
... to be detected. mode. In fact, the tip can be programmed to stay long enough to complete a spectrum measurement (such as I-V curve) at each pixel.[26] SILICON NANOSCALE STEPS AND DISLOCATIONS During recent development of high voltage power devices, failures occurred due to source-drain (S/D) leakage in n-type...
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Scanning probe microscopy (SPM) is widely used for fault isolation as well as diagnosing leakage current, detecting open circuits, and characterizing doping related defects. In this article, the author presents two SPM applications that are fairly uncommon but no less important in the scope of failure analysis. The first case involves the discovery of nano-steps on the surface of high-voltage NFETs, a phenomenon associated with stress-induced crystalline shift along the (111) silicon plane. In the second case, the author uses an AFM probe in the conductive mode to correlate tunneling current distribution with hot spots in high-k gate oxide films, which is shown to be a better indicator of oxide quality than rms surface roughness.
Journal Articles
EDFA Technical Articles (2008) 10 (2): 12–18.
Published: 01 May 2008
... simultaneously, they can be overlaid to indicate the exact position of the device response. Static Techniques (c) Fig. 3 (d) Graphs showing shift in device I-V curves caused by laser injection. The magnitude of each effect depends on the specific device geometry, material, laser power, and so...
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The power of scanning optical microscopes (SOMs) lies in their ability to direct a small spot of light into an IC, producing photocarriers and heat in a localized area of the circuit. Photonic and thermal energy affect the I-V characteristics of the circuit in different ways, depending on the presence of defects and local material properties. This article explains how light beams interact with semiconductors and metals and how they influence the I-V characteristic of circuits and devices. It describes the basic physics of SOM measurements, provides examples of static and dynamic SOM techniques, and discusses emerging applications.
Journal Articles
EDFA Technical Articles (2000) 2 (4): 36–38.
Published: 01 November 2000
... failed tests after dynamic burn-in. The burn-in conditions used a vector set at 6 V for 168 hours and 125°C. Photon emission microscopy was done on the samples and the results showed multiple light emission sites (Fig. 8). Spectral emission analysis on two ICs showed two spectra from one of the failures...
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Recent advances in spectrometers now give sufficient sensitivity to measure the spectral content of the very weak light emission produced by failing semiconductor devices. This article examines light spectra from the most common defect classes in order to demonstrate the strengths and weakness of spectral analysis in the context of semiconductor failure investigations. The conclusion is that signature analysis may not provide a definitive root cause, but it can help confirm the root cause after further analysis is performed.
Journal Articles
EDFA Technical Articles (2022) 24 (3): 24–31.
Published: 01 August 2022
... the failed device is compared to a fresh one. (continued on page 30) ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 24 NO. 3 (a) (b) (c) (d) Fig. 5 SCM analysis, (a) schematic of the probe-sample system in the SCM multidimensional approach; (b) AFM force-curve as a function of time; (c) SCM phase mapping at VDC...
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This article demonstrates the value of atomic force microscopes, particularly the different electrical modes, for characterizing complex microelectronic structures. It presents experimental results obtained from deep trench isolation (DTI) structures using SCM and SSRM analysis with emphasis on the voltage applied by the AFM. From these measurements, a failure analysis workflow is proposed that facilitates AFM voltage optimization to reveal the structure of cross-sectioned samples, make comparisons, and determine the underlying cause of failures.
Journal Articles
EDFA Technical Articles (2008) 10 (1): 18–22.
Published: 01 February 2008
... device can be caused to fail by an ESD event. Devices that withstand 4000 V are considered very robust. A common minimum expectation for ICs is a human body model damage threshold of more than 2200 V for any combination of two pins. Devices susceptible to damage by 1000 V or less require exceptional care...
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The reliability of a component is the probability that it will perform its function under specified conditions for a specified length of time. Key considerations in defining and designing reliability tests are reviewed in this article, which also discusses the interpretation of test results.
Journal Articles
EDFA Technical Articles (2012) 14 (1): 14–20.
Published: 01 February 2012
... value may automatically be protected against the possibility of tin metal vapor arc formation. The Paschen curve gives the experimentally determined breakdown voltage below which a sustained arc cannot form. For air, nitrogen, and other common gases, the Paschen curve minimum ranges from 200 to 300 V...
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Tin whiskers are single-crystal filaments that can grow from tin-plated copper or nickel components. This article discusses the effect of plating thickness, composition, and grain size on tin whisker formation and explains how to assess damage potential based on microanalysis, whisker length distribution models, and metal vapor arc risk factors. The authors also present and analyze several examples of failures caused by tin whisker formation in space systems.
Journal Articles
EDFA Technical Articles (2015) 17 (1): 4–10.
Published: 01 February 2015
... generated at 0 V, or the intersection of the IV curve and the current axis. The VOC is the voltage observed at 0 A, or Fig. 1 Typical IV curve (solid red line) under illumination illustrating the definition of short-circuit current, opencircuit voltage, and maximum power point. Note that positive current...
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This article provides an overview of the types of failures that tend to occur in photovoltaic (PV) modules in the field and the methods typically used to investigate them. It covers the causes and effects of broken and corroded interconnects, cracked and damaged cells, short and open bypass diodes, delamination, moisture ingress, and encapsulant discoloration. It describes tools and techniques commonly employed in the analysis of PV failures, including IV measurements, electroluminescence, infrared imaging, and visual inspection. It also discusses current and emerging challenges in PV failure analysis and reliability.
Journal Articles
EDFA Technical Articles (2017) 19 (3): 12–20.
Published: 01 August 2017
.... The scan spans from the inner end of the JTE near the top metal contact to the outer end of the JTE near the isolation trench. (a) 585 V breakdown device. (b) 747 V breakdown device. (c) 2331 V breakdown device. The applied voltage at which the peak transfers from the isolation trench to the metal contact...
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This article discusses the use of scanning-beam techniques such as EBIC, IBIC, and OBIC to optimize the design of edge-termination structures in vertical GaN and AlGaN power diodes.
Journal Articles
EDFA Technical Articles (2004) 6 (1): 13–21.
Published: 01 February 2004
... Designs, VLSI Tech. Symp. Digest, 1997, pp. 69-70. 4. A. Keshavarzi, S. Narenda, S. Borkar, C. Hawkins, K. Roy, and V. Dey: Technology Scaling Behavior of Optimum Reverse Body Bias for Leakage Power Reduction in CMOS IC s, Proc. ISLPED, 1999, pp. 252-54. 5. Y. Taur and T. Ning: Fundamentals of Modern...
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ICs designed for portable devices often make use of reverse-body bias (RBB) modes to limit leakage currents. The added complexity of RBB support circuitry presents a challenge during IC characterization and debug. This article discusses the nature of the problem and explains how to identify irregularities in circuits operating in the body-biased condition using standard debug tools with simple modifications. It describes some of the bugs discovered in an actual examination and explains how they were diagnosed by analyzing I-V curve traces and infrared emission microscopy (IREM) images.
Journal Articles
EDFA Technical Articles (2015) 17 (2): 10–17.
Published: 01 May 2015
... The three analysis modes that are possible with TR-LADA. (a) Single image where the timing of the laser pulse is held constant relative to the start of the test loop. (b) Movie, or sequence of images, in which x, y, and time vary. (c) TR-LADA waveform where x and y are held constant on one particular LADA...
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Laser-assisted device alteration (LADA) is an effective tool for identifying speed-limiting paths in ICs. When implemented with a continuous wave laser, it can reveal where the speed-limiting path resides but not when the slow (or fast) logic transition is occurring. To overcome this limitation, an enhanced version of the technique has been developed. This article discusses the capabilities of the new method, called picosecond time-resolved LADA, and explains how it complements the existing failure analysis toolset, facilitating faster resolution of issues and root-cause identification.
Journal Articles
EDFA Technical Articles (2004) 6 (3): 13–18.
Published: 01 August 2004
... A current for a 50 m line will drop VDD by 0.5 V (50 m /square is approximately the sheet resistance of Cu interconnections). The die temperature of modern ICs is reported to be as high as 135 °C.3 Transient hot spots can occur for these die, making speed prediction difficult for CAD tools. Clock lines...
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Parametric failures are of two general types. One type is due to defects that affect circuit parameters. The other type, which occurs in defect-free parts, is the result of interdie parameter statistical variation. IC failures can be caused by variations in any number of parameters including L eff , W eff , I Dsat , V t , contact resistance, effective gate oxide thickness, source and drain resistance, interconnect sheet resistance, and intrametal spacing affecting cross-talk, ground bounce noise, and IR voltage drops. These failures often influence the maximum operating frequency of the IC and are seldom detected by simple stuck-at fault, delay fault, functional, or I DDQ tests. This article discusses the origin, classification, and detection of a wide range of parametric failures.
Journal Articles
EDFA Technical Articles (2014) 16 (1): 4–16.
Published: 01 February 2014
... C with a biprism voltage of 120 V Fig. 6 (a) Mean inner potential maps of pFET devices with 220 nm gate width. (b) Potential map of pFET with 70 nm gate width Volume 16 No. 1 11 Dual-Lens Electron Holography Fig. 6(b), the upper curved portion of the p-n junction the edge of the silicon diffusion...
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IBM engineers have developed a holographic imaging technique, called dual-lens electron holography, that provides high spatial resolution and field of view without compromising signal-to-noise ratio. This article reviews the basic principles of the new method and provides several examples of its use. The first few examples demonstrate the junction profiling capabilities of the new method which, in one case, helps to explain why shallow junction devices are made with raised source-drain regions. In the other examples, dual-lens holography is used for strain mapping, in one case, to study strain distributions in sigma-shaped SiGe devices, and in another, to provide evidence that stress memorization occurs in dislocations in the source-drain region of nFET devices.
Journal Articles
EDFA Technical Articles (2022) 24 (2): 4–10.
Published: 01 May 2022
.... 8 Hotspot of the failed LED detected by thermal emission. Fig. 10 IV curve and thermal emission of a good reference LED. edfas.org ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 24 NO. 2 8 (a) (b) (c) visible light. Energy dispersive x-ray spectroscopy (EDS) can obtain qualitative and semi-quantitative...
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The failure of a white LED backlight module in a portable computer illustrates the challenges that component and system suppliers must overcome in order to determine root-cause failure mechanisms and take corrective actions that address the problem.
Journal Articles
EDFA Technical Articles (2001) 3 (3): 15–18.
Published: 01 August 2001
... an electron beam bombards a sample, the primary electrons interact with the target atoms in a variety of ways to generate: (a) low energy secondary electrons with an energy in the range 0-50 eV, (b) Auger electrons and characteristic x-rays, (c) photons that give rise to cathodoluminescence , and (d...
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Voltage contrast, a phenomenon that occurs in scanning electron microscopes, produces brightness variations in SEM images that correspond to potential variations on the test sample. Through appropriate processing, voltage contrast signals can reveal an extensive amount of information about the functionality of ICs. Voltage contrast can be used, for example, to map electrical logic levels and timing waveforms from internal nodes of the chip as it operates inside the SEM chamber. This article describes the fundamentals of voltage contrast and its applications in IC failure analysis.
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