Search Results for 3D integration

X-ray ptychography, as recent studies show, has the potential to bridge the gap that currently exists between conventional X-ray imaging and electron microscopy. This article covers the evolution of the technology from basic 2D imaging to computed tomography to 3D ptychographic X-ray laminography (PyXL) with zoom. To demonstrate the capabilities of PyXL, a 16-nm FinFET logic IC was mechanically polished to a thickness of 20 µm and several regions were imaged at various levels of resolution.

Chip-level 3D integration, where chips are thinned, stacked, and vertically interconnected using TSVs and microbumps, brings as many challenges as it does improvements, particularly in the area of failure analysis. This article assesses the capabilities of various FA techniques in light of the challenges posed by 3D integration and identifies current shortcomings and future needs.

This column explains that silicon interposers, considered an interim solution to full 3D integration, may turn out to be more than a stepping stone along the path toward 3D ICs.

This column provides an update on the latest developments in 3D IC technology and outlines the work that still remains before the promises of full 3D integration can be realized.

Failure analysis is becoming increasingly difficult with the emergence of 3D integrated packages due to their complex layouts, diverse materials, shrinking dimensions, and tight fits. This article demonstrates several FA techniques, including high-frequency scanning acoustic microscopy, lock-in thermography, and FIB cross-sectioning in combination with plasma ion etching or laser ablation. Detailed case studies show how the various methods can be used to analyze bonding integrity between different materials, chip-to-chip interface structures, buried interconnect defects, and through-silicon vias at either the device or package level.

This article provides a summary of the ISTFA 2012 Panel Discussion on the FA challenges associated with 3D integrated packages.

This article describes a form of lock-in thermography that achieves 3D localization of thermally active defects in stacked die packages. In this approach, phase shifts associated with thermal propagation delay are analyzed as a function of frequency. This allows for a precise localization of defects in all three spatial dimensions and can serve as a guide for subsequent high-resolution physical analyses.

This column provides commentary about the 2020 EDFAS Virtual Workshop. Highlights from the three days of online sessions include a keynote address on the history of MEMS, a panel discussion on 3D packaging technologies, and nearly 60 technical papers and posters. Workshop attendees also had the opportunity to walk through a virtual Expo Hall and learn about new analytical tools and techniques and interact with equipment vendors.

Engineers at the Fraunhofer Institute for Microstructure of Materials and Systems built and are testing a scanning acoustic microscope (SAM) that operates at frequencies of up to 2 GHz. Here they describe the design of their GHz-SAM and present examples showing how it is used to detect stress induced voids, inspect wire bond interfaces, and examine through-silicon vias (TSVs) in the time-resolved mode.

Laser-assisted copper deposition provides a key technology for analyzing complex packaging and integrated circuit challenges. Laser-based copper deposition techniques have been shown to be useful in combination with traditional FIB techniques to improve resistivity, deposition rate, and timing.

This article provides a brief introduction to through-silicon via technology, a system-level architecture in which multiple layers of planar devices are stacked with interconnects running in the vertical as well as lateral direction. Some of the different fabrication processes in use are discussed along with related challenges.

This article shows how 3D XRM can be applied to nondestructively detect non-optimized assembly processes that can influence local stresses and overall device reliability. This makes it useful for process development and failure analysis. When used along with AI training models, 3D XRM can achieve analysis of highly integrated packaging structures with reasonable throughput for process validation and error correction guidance.

The Package Innovation Roadmap Council (PIRC) was established as part of the Failure Analysis Technology Roadmap activity at the direction of the EDFAS Board. This column provides an overview of a technical paper by the PIRC that highlights recent innovations, technology gaps, and future development trends in package fault isolation and failure analysis. The paper focuses on three main categories: 1) Artificial intelligence (AI) applications, 2) Sample handling, and 3) FA tool robustness.

The complexity of sample preparation and deprocessing has risen exponentially with the emergence of 2.5-D and 3D packages. This article provides answers and insights on how to deal with the challenges of increasingly complex semiconductor packages. After identifying pressing issues and potential bottlenecks with state-of-the-art FA flows, the authors present two case studies demonstrating the capabilities of electro-optical terahertz pulse reflectometry (EOTPR), plasma FIB milling, and 3D X-ray imaging. The FA results confirm the potential of all three techniques and indicate that a fully nondestructive integration flow for 3D packages may be achievable with further development and optimization.

The second Electronics Resurgence Initiative (ERI 2.0), sponsored by the U.S. Defense Advanced Research Project Agency (DARPA) Microsystems Technology Office (MTO), is focused on driving next generation dual use microelectronics for national security and domestic needs. The initiative focuses on creating U.S. capability for three-dimensional heterogeneous integration (3DHI) manufacturing and pursuing focused research for the manufacture of complex 3D microsystems. This guest editorial describes the outcomes from a three-day summit (Seattle, Washington, August 2023) where the initiative was launched.

It seems that scaling of chip technology according to Moore’s Law will continue for digital functionalities (logic and memory); however, increasing system integration on chip and package levels, called “More than Moore,” has been observed in the past several years. This strong trend in the worldwide semiconductor industry enables more functionality, diversification, and higher value by creating smart microsystems. This article discusses the many challenges faced in FA of 3-D chips, where well-staffed and equipped FA labs are essential. Furthermore, FA is becoming an important strategic enabling factor for new products, not just another “cost factor.”

This article describes recent advancements in multi-probe sensing schemes and development of a tomographic atomic force microscopy tool for materials research and failure analysis.

The inverted orientation of a flip-chip packaged die makes it vulnerable to optical attacks from the backside. This article discusses the nature of that vulnerability, assesses the threats posed by optical inspection tools and techniques, and provides insights on effective countermeasures.

This column is part of a series of reports on the findings to date of the EDFAS Failure Analysis Roadmap Councils. The Failure Analysis Future Roadmap Council (FAFRC) is concerned with identifying the longer term needs of the FA community. This article discusses analysis challenges associated with the growing number of elements being incorporated into integrated circuit fabrication. It includes tables summarizing top challenges in front end and package analysis.

This article demonstrates the value of atomic force microscopes, particularly the different electrical modes, for characterizing complex microelectronic structures. It presents experimental results obtained from deep trench isolation (DTI) structures using SCM and SSRM analysis with emphasis on the voltage applied by the AFM. From these measurements, a failure analysis workflow is proposed that facilitates AFM voltage optimization to reveal the structure of cross-sectioned samples, make comparisons, and determine the underlying cause of failures.