A scanning electron microscope system measures voltage contrast on device-under-test surfaces. This article addresses a limited set of applications that rely on voltage contrast (VC) measurements in SEM systems, showing how VC measurements can probe electrical activity running at speeds as high as 2 GHz on modern active integrated circuits.

Lock-in thermography (LIT) is a widely used nondestructive tool for detecting the failure location in integrated circuits. The image pattern recognition algorithm for detecting LIT hotspots benefits image processing and can be leveraged to automate failure analysis processes.

Scanning microwave impedance microscopy is a nearfield technique using microwaves to probe the electrical properties of materials with nanoscale lateral resolution.

This article describes how physical attacks can be launched on different types of nonvolatile memory (NVM) cells using failure analysis tools. It explains how the bit information stored inside these devices is susceptible to read-out and fault injection attacks and defines vulnerability parameters to help quantify risks associated with different modalities of attack. It also presents an in-depth security analysis of emerging NVM technologies and discusses potential countermeasures.

This article presents and evaluates a calibration method that significantly improves the spectral information that can be extracted from photon emission signals obtained from semiconductor devices. Step-by-step instructions are given for calibrating photon emission microscopes for specific measurements such as device parameters and material band gap. The article also discusses the types of errors that can occur during calibration. Although the procedure presented is used on InGaAs sensors, it applies to all common photon emission detectors.

This article describes a hardware metering fingerprint technique, called the memometer, that addresses supply chain integrity issues with field-programmable gate arrays (FPGAs). The memometer is a physically unclonable function (PUF) based on cross-coupled lookup tables that overcomes manufacturing memory power-on preset. The fingerprints are not only unique, but also reliable with average hamming distances close to the ideal values of 50% (interchip) and 0% (intrachip). Instead of having one fingerprint per device, the memometer makes provision for hundreds with the potential for more.

This article demonstrates the value of atomic force microscopes, particularly the different electrical modes, for characterizing complex microelectronic structures. It presents experimental results obtained from deep trench isolation (DTI) structures using SCM and SSRM analysis with emphasis on the voltage applied by the AFM. From these measurements, a failure analysis workflow is proposed that facilitates AFM voltage optimization to reveal the structure of cross-sectioned samples, make comparisons, and determine the underlying cause of failures.

This article proposes a design for a real-time Trojan detection system and explores possible solutions to the challenge of large-scale SEM image acquisition. One such solution, a deep-learning approach that generates synthetic micrographs from layout images, shows significant promise. Learning-based approaches are also used to both synthesize and classify cells. The classification outcome is matched with the design exchange format file entry to ensure the purity of the underlying IC.

Inline wafer electrical testing (WET) offers an early read on semiconductor manufacturing processes via measurements taken on test structures placed throughout the wafer. Interpreting the data can be challenging, however. In many cases, only a sample of the test sites are monitored in production. Complex manufacturing requirements further complicate the problem because some operations are iteratively executed within subregions across a given wafer, while others are run on the entire wafer at once, and still others are applied to wafers in batches. This results in a nested variance structure under which different physical mechanisms exhibit varying sensitivities to site-to-site, wafer-to-wafer, and lot-to-lot variations. This article uses Monte Carlo simulations to explore the impacts these hierarchical variance components can exert on perceptions of WET performance.

This article provides an overview of a commercial 3D X-ray system, explaining how it acquires high-resolution images of submicron defects in large intact samples. It presents examples in which the system is used to reveal cracks in thin redistribution layers, voids in organic substrates, and variations in TSV metallization on 300-mm wafers. As the authors explain, each scan can be done in as little as a few minutes regardless of sample size, and the resulting images are clear of the beam hardening artifacts that often cause problems in failure analysis and reverse engineering.

Interposers play an important role in 2.5D and 3D packages, routing power and communication signals between dies while maintaining electrical contact with I/O pins. This role and their relatively simple construction makes interposers a target for malicious attacks. In this article, the authors assess the vulnerabilities inherent in the fabrication of interposers and describe various types of optical attacks along with practical countermeasures.

This article discusses the tradeoffs associated with minimizing beam dose in a scanning transmission electron microscope (STEM) and explains how to reduce beam exposure through subsampling and inpainting, a signal reconstruction technique that optimizes image quality and resolution. Although the method is described in the context of STEM imaging, it applies to any scanned imaging system.

This article describes the basic measurement physics of scanning nitrogen vacancy (NV) microscopy and the various ways it can be used in semiconductor device failure analysis. Scanning NV microscopy can measure topography as well as magnetic fields, local current density, ac noise, and local temperature variations.

Scanning nonlinear dielectric microscopy (SNDM) is a scanning probe technique that measures changes in oscillation frequency between the probe tip and a voltage-biased sample. As the probe moves across the surface of a semiconductor device, the oscillation frequency changes in response to variations in dielectric properties, charge and carrier density, dopant concentration, interface states, or any number of other variables that affect local capacitance. Over the past few years, researchers at Tohoku University have made several improvements in dielectric microscopy, the latest of which is a digital version called time-resolved SNDM (tr-SNDM). Here they describe their new technique and present an application in which it is used to acquire CV, d C /d V-V , and DLTS data from SiO 2 /SiC interface samples.

This article provides a brief overview of STEM-in-SEM, discussing the pros and cons, recent advancements in detector technology, and the emergence of 4D STEM-in-SEM, a relatively new method that uses diffraction patterns recorded at different raster positions to enhance images offline in selected regions of interest.

This article describes a novel method for improving image resolution achieved using time-resolved photon emission techniques. Instead of directly generating images from photon counting, all detected photons are displayed as a point cloud in 3D space and a new higher-resolution image is generated based on probability density functions associated with photon distributions. Unsupervised learning algorithms identify photon distribution patterns as well as fainter emission sources.

Circuit boards are vulnerable to a wide range of ill-intentioned modifications done to gain access to information or malevolently influence control. This article describes the various ways attacks on circuit board can occur and presents examples showing how such attacks might look. It also provides general guidelines for protecting circuit-board design integrity.

X-ray ptychography, as recent studies show, has the potential to bridge the gap that currently exists between conventional X-ray imaging and electron microscopy. This article covers the evolution of the technology from basic 2D imaging to computed tomography to 3D ptychographic X-ray laminography (PyXL) with zoom. To demonstrate the capabilities of PyXL, a 16-nm FinFET logic IC was mechanically polished to a thickness of 20 µm and several regions were imaged at various levels of resolution.

The inverted orientation of a flip-chip packaged die makes it vulnerable to optical attacks from the backside. This article discusses the nature of that vulnerability, assesses the threats posed by optical inspection tools and techniques, and provides insights on effective countermeasures.

Various NVM technologies are being explored for neuromorphic system realization, including resistive RAM, ferroelectric RAM, phase change RAM, spin transfer torque RAM, and NAND flash. This article discusses the potential of RRAM for such applications and evaluates key performance and reliability metrics in the context of neural network image classification. The authors conclude that the accuracy-power tradeoff may be further improved using alternative material stacks and multi-layer dielectrics so as to achieve better control of the oxygen vacancy or metallic filamentation process that governs RRAM switching characteristics.