The electronic device failure analysis community will be instrumental in successfully guiding the industry's transformation in reponse to demand for artificial intelligence capabilities. This editorial outlines the challenge and how the FA community can help address growing needs in this technical area.

A deep learning-based nondestructive approach for void segmentation in BGA solder balls using 3D x-ray microscopy is presented.

This article describes a proposed novel metric to furnish chip designers with a prognostic tool for x-ray imaging in the pre-silicon stage. This metric is fashioned to provide designers with a concrete measure of how visible the fine-pitched features of their designs are under x-ray inspection. It utilizes a combination of x-ray image data collection, analysis, and simulations to evaluate different design elements.

A numerical investigation of the probabilistic approach in estimating the reliability of wire bonding is presented along with a reliability based design optimization methodology for microelectronic devices structures.

This guest column outlines pilot programs and activities undertaken by the Electronic Device Failure Analysis Society to engage students and young professionals.

The goals of the workshop were twofold: Give NIST researchers an industry perspective and evaluate the CHIPS Act Metrology R&D program industry relevance to plan to future projects. This guest editorial provides a brief overview of the February 2024 workshop and its outcomes.

The influence of electric current flow and electrically induced Joule heat on thermal stress for weld joint cracks at both interfaces is still not fully comprehended. This article investigates the effect of subjecting the ball grid array package to a cyclic current input. Current density, Joule effect, and temperature curves are examined.

This article proposes the MicroStructural Hierarchy Descriptor (µSHD) as a systematic and quantitative approach to spectra and image data in microelectronics failure analysis. It discusses concrete routes for employing µSHD directly as the quantitative descriptor for supervised and unsupervised machine learning. The authors propose that µSHD tools can be used to automate and improve characterization techniques and image processing and analysis protocols.

This article presents the principles of scanning thermal microscopy (SThM) instruments and their potential uses for the local thermal analysis of passive and active electronic components and devices. Three examples are given that demonstrate the SThM’s ability to perform thermal analysis on a microscopic scale. The results suggest that SThM could be used as a powerful tool for analyzing printed circuit boards and electronic devices with high spatial resolution, during the development cycle, failure analysis during and after manufacture, and during operation.

Differential laser voltage probe simultaneously acquires waveform data from a single target while the device under test fluctuates between passing and failing test outcomes. This article describes the use of this technique and how it could be affected by trends in the microelectronics industry.

The second Electronics Resurgence Initiative (ERI 2.0), sponsored by the U.S. Defense Advanced Research Project Agency (DARPA) Microsystems Technology Office (MTO), is focused on driving next generation dual use microelectronics for national security and domestic needs. The initiative focuses on creating U.S. capability for three-dimensional heterogeneous integration (3DHI) manufacturing and pursuing focused research for the manufacture of complex 3D microsystems. This guest editorial describes the outcomes from a three-day summit (Seattle, Washington, August 2023) where the initiative was launched.

New materials integration and improved design can be promoted by using atom probe tomography (APT) as an analysis technique. This article provides an overview of APT principles and setups and provides diverse examples that focus on its use to characterize electronic devices.

Four-dimensional scanning transmission electron microscopy (4D-STEM) is a spatially resolved electron diffraction technique that records the electron scattering distribution at each point of the electron beam raster, thereby producing a four-dimensional dataset. This second installment of this series presents applications of 4D-STEM, including measurements of crystal orientation and phase, short- and medium-range order, and internal electromagnetic fields.

This article is the third in a multi-part series describing techniques for thinning and polishing a highly warped die. Tighter thickness tolerance and thinner samples are always desired. The first article addressed global thinning of a sample. The second focused on the process and problems of thinning only the area of interest. This installment covers processes and considerations for both global and area of interest treatment and provides reference process recipes.

The EDFAS Die-Level Roadmap Committee was formed to identify forthcoming challenges related to electrical fault isolation within the next five years and collaborate with various stakeholders, including industry, academia, and tool vendors, to devise practical solutions. To that end, the team has pinpointed five critical areas of focus: (1) laser-based, photon emission, and thermal; (2) 2D/2.5D/3D packaging; (3) product yield, test, and diagnostics; (4) general (leading edge technologies); and (5) system level, analog/RF, and digital functional.

This article describes recent advancements in multi-probe sensing schemes and development of a tomographic atomic force microscopy tool for materials research and failure analysis.

A scanning electron microscope system measures voltage contrast on device-under-test surfaces. This article addresses a limited set of applications that rely on voltage contrast (VC) measurements in SEM systems, showing how VC measurements can probe electrical activity running at speeds as high as 2 GHz on modern active integrated circuits.

Laser-assisted copper deposition provides a key technology for analyzing complex packaging and integrated circuit challenges. Laser-based copper deposition techniques have been shown to be useful in combination with traditional FIB techniques to improve resistivity, deposition rate, and timing.

The high energy-resolving power of superconducting x-ray detectors reduces unwanted x-ray backgrounds, uses x-ray photons efficiently, and allows for discrimination among multiple chemical elements in a sample. This article discusses the challenges of analyzing the internal structure and composition of integrated circuits, and how 3D imaging can benefit manufacturers and researchers. It covers the development of superconducting x-ray sensors, their advantages over traditional sensors, potential applications, and focus areas for future work to develop this technology.

The Electronic Device Failure Analysis Society established the Die-Level Post-Isolation Domain Council to provide an overview of the upcoming challenges in this area and guide technique developments for next-generation analytical tools. This column summarizes the findings of the council in the areas of sample preparation, microscopy, nanoprobing, circuit editing, and scanning probe microscopy. It is a preview of the full roadmap document, which is in preparation to be released to the EDFAS community.