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E. Jan Vardaman
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Journal Articles
Publisher: Journals Gateway
EDFA Technical Articles (2014) 16 (4): 20–24.
Published: 01 November 2014
Abstract
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This article assesses the progress that has been made in the development and implementation of through-silicon via (TSV) technology, the work yet to be done, and the challenges associated with potential failure mechanisms.
Journal Articles
Publisher: Journals Gateway
EDFA Technical Articles (2013) 15 (3): 46–47.
Published: 01 August 2013
Abstract
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This column provides an update on the latest developments in 3D IC technology and outlines the work that still remains before the promises of full 3D integration can be realized.
Journal Articles
Publisher: Journals Gateway
EDFA Technical Articles (2012) 14 (3): 46–47.
Published: 01 August 2012
Abstract
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The pace of development for 2.5-D packaging solutions appears to be accelerating as the timeline for the adoption of 3D through-silicon via (TSV) technology continues to slide. This column discusses the latest advancements in 2.5-D or interposer packaging technology and the growing number of applications.
Journal Articles
Publisher: Journals Gateway
EDFA Technical Articles (2011) 13 (1): 46–48.
Published: 01 February 2011
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This column explains that silicon interposers, considered an interim solution to full 3D integration, may turn out to be more than a stepping stone along the path toward 3D ICs.
Journal Articles
Publisher: Journals Gateway
EDFA Technical Articles (2008) 10 (4): 30–32.
Published: 01 November 2008
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This article provides a brief introduction to through-silicon via technology, a system-level architecture in which multiple layers of planar devices are stacked with interconnects running in the vertical as well as lateral direction. Some of the different fabrication processes in use are discussed along with related challenges.